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1. (WO2017039949) MEMORY DEVICE ON-DIE ERROR CHECKING AND CORRECTING CODE

Pub. No.:    WO/2017/039949    International Application No.:    PCT/US2016/045643
Publication Date: Fri Mar 10 00:59:59 CET 2017 International Filing Date: Fri Aug 05 01:59:59 CEST 2016
IPC: G06F 11/10
Applicants: INTEL CORPORATION
Inventors: HALBERT, John B
BAINS, Kuljit S
CRISS, Kjersten, E.
Title: MEMORY DEVICE ON-DIE ERROR CHECKING AND CORRECTING CODE
Abstract:
In a system where a memory device performs on-die ECC, the ECC operates on N-bit data words as two (N/2)-bit segments, with a code matrix having a corresponding N codes that can be operated on as a first portion of (N/2) codes and a second portion of (N/2) codes to compute first and second error checks for first and second (N/2)-bit segments of the data word, respectively. In the code matrix, a bitwise XOR of any two codes in the first portion of the code matrix or any two codes in the second portion of the code matrix results in a code that is either not in the code matrix or is in the other portion of the code matrix. Thus, a miscorrected double bit error in one portion causes a bit to be toggled in the other portion instead of creating a triple bit error.