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1. (WO2017039583) USE OF SACRIFICIAL MATERIAL TO COMPENSATE FOR THICKNESS VARIATION IN MICROELECTRONIC SUBSTRATES
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2017/039583 International Application No.: PCT/US2015/047440
Publication Date: 09.03.2017 International Filing Date: 28.08.2015
IPC:
H01L 25/07 (2006.01) ,H01L 23/48 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
CHEN, Chi-Mon; US
LI, Yi; US
WU, Tao; US
ZHOU, Zheng; US
SALAMA, Islam A.; US
LIU, Yueli; US
ALUR, Amruthavalli P.; US
SHARMA, Nikhil; US
Agent:
WINKLE, Robert, G.; US
Priority Data:
Title (EN) USE OF SACRIFICIAL MATERIAL TO COMPENSATE FOR THICKNESS VARIATION IN MICROELECTRONIC SUBSTRATES
(FR) UTILISATION D'UN MATÉRIAU SACRIFICIEL POUR COMPENSER LA VARIATION DE L'ÉPAISSEUR DANS DES SUBSTRATS MICROÉLECTRONIQUES
Abstract:
(EN) A microelectronic package may be fabricated by forming a microelectronic substrate having a front surface and a back surface, transferring thickness variation in the microelectronic substrate to the microelectronic substrate back surface by attaching the microelectronic substrate front surface to a first fixture, forming a sacrificial material over the microelectronic substrate back surface having a first surface opposing the microelectronic substrate back surface, removing the microelectronic substrate from the first substrate, attaching the sacrificial material first surface to a second fixture, and attaching at least one microelectronic device to the microelectronic substrate front surface. In another embodiment, a releasing layer may be disposed between the microelectronic substrate back surface and the sacrificial material.
(FR) Cette invention concerne un boîtier microélectronique éventuellement fabriqué par la formation d'un substrat microélectronique présentant une surface avant et une surface arrière, le transfert de la variation de l'épaisseur dans le substrat micro-électronique vers la surface arrière du substrat microélectronique par la fixation de la surface avant du substrat microélectronique à un premier dispositif de fixation, la formation d'un matériau sacrificiel sur la surface arrière du substrat microélectronique présentant une première surface opposée à la surface arrière de substrat microélectronique, l'extraction du substrat microélectronique à partir du premier substrat, la fixation de la première surface du matériau sacrificiel à un second dispositif de fixation, et la fixation d'au moins un dispositif microélectronique à la surface avant du substrat microélectronique. Selon un autre mode de réalisation, une couche de anti-adhésive peut être disposée entre la surface arrière du substrat microélectronique et le matériau sacrificiel.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)