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1. (WO2017038905) SEMICONDUCTOR DEVICE, CHIP MODULE, AND SEMICONDUCTOR MODULE

Pub. No.:    WO/2017/038905    International Application No.:    PCT/JP2016/075578
Publication Date: Fri Mar 10 00:59:59 CET 2017 International Filing Date: Thu Sep 01 01:59:59 CEST 2016
IPC: H01L 23/12
H05K 3/46
Applicants: AISIN AW CO., LTD.
アイシン・エィ・ダブリュ株式会社
Inventors: NARUSE Takanobu
成瀬峰信
Title: SEMICONDUCTOR DEVICE, CHIP MODULE, AND SEMICONDUCTOR MODULE
Abstract:
Provided is a technology which is capable of inhibiting reduction in the effective area of wiring due to through holes, and which is capable of stably supplying power. In this semiconductor device (1), a surface-layer power supply path (40), which supplies power to a semiconductor chip (51p) via an inner-circumferential-side power supply terminal group (141g) and an outer-circumferential-side power supply terminal group (16g), is provided to a surface-layer wiring layer (31) of a main substrate (3) provided with a plurality of wiring layers (31, 32, 33, 39) and through holes (TH), said surface-layer wiring layer having a chip module (5M) mounted thereto. The surface-layer power supply path (40) is continuously formed so as to overlap the inner-circumferential-side power supply terminal group (141g) and the outer-circumferential-side power supply terminal group (16g) when viewed from an orthogonal direction (Z), and extend in a direction (Y) heading towards the outer circumferential side of the main substrate (3) from a position connected to the inner-circumferential-side power supply terminal group (141g).