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1. (WO2017038174) POWER MANAGEMENT INTERGRATED CIRCUIT, ELECTRONIC DEVICE, AND METHOD FOR CONTROLLING POWER MANAGEMENT INTERGRATED CIRCUIT

Pub. No.:    WO/2017/038174    International Application No.:    PCT/JP2016/065883
Publication Date: Fri Mar 10 00:59:59 CET 2017 International Filing Date: Tue May 31 01:59:59 CEST 2016
IPC: G06F 1/32
Applicants: SONY CORPORATION
ソニー株式会社
Inventors: MATSUKAWA, Tomohiro
松川 朋広
KATAYAMA, Yasushi
片山 靖
SEKIYA, Akito
関谷 彰人
Title: POWER MANAGEMENT INTERGRATED CIRCUIT, ELECTRONIC DEVICE, AND METHOD FOR CONTROLLING POWER MANAGEMENT INTERGRATED CIRCUIT
Abstract:
The present invention reduces power consumption of a device equipped with a central processing unit (CPU) and a power management integrated circuit (PMIC). The power management integrated circuit is equipped with a determination unit, a holding unit, a power supply unit, and a communication unit. The determination unit, upon determining the presence/absence of a recovery factor for recovering from an energy-saving mode, generates recovery factor information indicating the determination result. The holding unit holds the recovery factor information. Upon occurrence of the recovery factor, the power supply unit supplies power to a processing unit. When the processing unit is activated by the supplied power, the communication unit transmits the held recovery factor information to the processing unit.