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1. (WO2017037475) ASSEMBLY OF SEMICONDUCTOR DEVICES
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Pub. No.: WO/2017/037475 International Application No.: PCT/GB2016/052722
Publication Date: 09.03.2017 International Filing Date: 02.09.2016
IPC:
G09G 3/00 (2006.01) ,H01L 25/075 (2006.01)
G PHYSICS
09
EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
G
ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3
Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
075
the devices being of a type provided for in group H01L33/78
Applicants:
OCULUS VR, LLC [US/US]; 1601 Willow Road Menlo Park, California 94025, US
BLAKE, Stephen [GB/GB]; GB (MG)
Inventors:
HUGHES, Padraig; IE
O'KEEFFE, Joseph; IE
OYER, Celine; IE
HENRY, William; IE
MASSOUBRE, David; IE
SAKETI, Pooya; FI
Agent:
GERNOT, H. Schröer; Meissner Bolte Patentanwälte Rechtsanwälte Partnerschaft mbB Bankgasse 3 90402 Nürnberg, DE
Priority Data:
1515564.102.09.2015GB
1520265.817.11.2015GB
1607248.026.04.2016GB
1609422.927.05.2016GB
Title (EN) ASSEMBLY OF SEMICONDUCTOR DEVICES
(FR) ENSEMBLE DE DISPOSITIFS À SEMI-CONDUCTEURS
Abstract:
(EN) A method for manufacturing a display element comprising a plurality of pixels, each comprising a plurality of sub-pixels. The method comprises undertaking, using a pick up tool, a first placement cycle (1908) comprising picking up a plurality of first, untested LED dies and placing them on a display substrate at locations corresponding to the plurality of pixels, testing (1912) the first LED emitters on the display substrate to determine one or more locations of non-functional first LED emitters, selecting one or more second tested LED dies based on a result of the test, configuring the selected one or more second LED dies to enable their pick up and placement on the display substrate and undertaking, using the PUT, a second placement cycle (2008) comprising picking up the selected one or more second LED dies and placing them on the display substrate at the determined locations of the non-functional first LED emitters.
(FR) L'invention concerne un procédé de fabrication d'un élément d'affichage comprenant une pluralité de pixels, comportant chacun une pluralité de sous-pixels. Le procédé consiste à entreprendre, à l'aide d'un doigt ramasseur, un premier cycle de placement (1908) consistant à ramasser une pluralité de premières puces de DEL non essayées et à les placer sur un substrat d'affichage à des emplacements correspondant à la pluralité de pixels, à essayer (1912) les premiers émetteurs à DEL sur le substrat d'affichage pour déterminer un ou plusieurs emplacements de premiers émetteurs à DEL non-fonctionnels, à sélectionner une ou plusieurs secondes puces de DEL essayées sur la base du résultat de l'essai, à configurer ladite ou lesdites secondes puces de DEL sélectionnées afin de permettre leur ramassage et leur placement sur le substrat d'affichage et à entreprendre, à l'aide du doigt ramasseur (PUT), un second cycle de placement (2008) consistant à ramasser ladite ou lesdites secondes puces de DEL sélectionnées et à les placer sur le substrat d'affichage aux emplacements déterminés des premiers émetteurs à DEL non-fonctionnels.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)