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1. (WO2017034810) V-GATE LAYOUT AND GATE DRIVE CONFIGURATION

Pub. No.:    WO/2017/034810    International Application No.:    PCT/US2016/046362
Publication Date: Fri Mar 03 00:59:59 CET 2017 International Filing Date: Thu Aug 11 01:59:59 CEST 2016
IPC: G09G 3/20
Applicants: APPLE INC.
Inventors: TANG, Howard H.
CHEN, Wei
SACCHETTO, Paolo
WANG, Chaohao
HUANG, Chun-Yao
CHIU, Hao-Lin
Title: V-GATE LAYOUT AND GATE DRIVE CONFIGURATION
Abstract:
A display device may include a plurality of pixels, a plurality of source lines that may provide a plurality of data line signals to the plurality of pixels, a plurality of gate lines that may provide a plurality of gate signals to a plurality of switches associated with the plurality of pixels, and a plurality of voltage gate lines disposed parallel to the plurality of source lines and coupled to the plurality of gate lines at a plurality of cross point nodes. The plurality of cross point nodes are positioned in a pseudo random order across the display device.