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1. (WO2017031879) ENABLE SIGNAL GENERATION CIRCUIT, POWER CONVERSION CIRCUIT, AND DISPLAY DEVICE

Pub. No.:    WO/2017/031879    International Application No.:    PCT/CN2015/098366
Publication Date: Fri Mar 03 00:59:59 CET 2017 International Filing Date: Thu Dec 24 00:59:59 CET 2015
IPC: H02M 1/36
H05B 37/02
Applicants: BOE TECHNOLOGY GROUP CO., LTD.
京东方科技集团股份有限公司
ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
鄂尔多斯市源盛光电有限责任公司
Inventors: ZHANG, Chenggeng
张成庚
ZHANG, Boya
张博雅
Title: ENABLE SIGNAL GENERATION CIRCUIT, POWER CONVERSION CIRCUIT, AND DISPLAY DEVICE
Abstract:
An enable signal generation circuit, a power conversion circuit, and a display device. The enable signal generation circuit comprises a first input end (Vin), a second input end (Swire) and an output end (EN) connected to the second input end, and further comprises an input module (101), a transmission module (102), a first conduction module (103), a first filtering module (104), and a second conduction module (105). The input module is used for inputting a direct-current signal from the first input end into a first node (PA) when a potential of the first input end is higher than a preset voltage value. The transmission module is used for transmitting the direct-current signal at the first node to the output end. The first conduction module is used for conducting a portion of the potential that is higher than that of the first node to the first node, the potential being the potential of an alternating current signal from the second input end. The first filtering module is used for carry out filtering on the first node so that the alternating current signal from the second input end at the first node is conducted to a common end (GND). The second conduction module is used for conducting a portion of the potential that is lower than that of the first node to the common end, the potential being the potential of the alternating current signal from the second input end. The enable signal generation circuit simplifies the circuit structure and resolves the problem of a DC-DC power supply chip failing to normally work due to the difference of signal input time sequences.