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1. (WO2017019866) PACKAGE-ON-PACKAGE (POP) STRUCTURE INCLUDING MULTIPLE DIES
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2017/019866 International Application No.: PCT/US2016/044487
Publication Date: 02.02.2017 International Filing Date: 28.07.2016
Chapter 2 Demand Filed: 26.05.2017
IPC:
H01L 21/60 (2006.01) ,H01L 23/538 (2006.01) ,H01L 23/13 (2006.01) ,H01L 23/498 (2006.01) ,H01L 21/56 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60
Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
538
the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
13
characterised by the shape
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488
consisting of soldered or bonded constructions
498
Leads on insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56
Encapsulations, e.g. encapsulating layers, coatings
Applicants: QUALCOMM INCORPORATED[US/US]; Attn: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors: WE, Hong Bok; US
LEE, Jae Sik; US
KIM, Dong Wook; US
GU, Shiqun; US
Agent: MOORE, Jason L.; US
TOLER, Jeffrey G.; US
Priority Data:
14/812,47629.07.2015US
Title (EN) PACKAGE-ON-PACKAGE (POP) STRUCTURE INCLUDING MULTIPLE DIES
(FR) STRUCTURE BOÎTIER SUR BOÎTIER (POP) COMPRENANT PLUSIEURS PUCES
Abstract:
(EN) A package-on-package (POP) structure is disclosed. The POP structure includes a first die (116), a second die (156), and a photo-imaged dielectric (PID) layer (124). The PID layer is disposed between the first die and the second die. The POP structure also includes a first conductive path (162,182) from the first die through the PID layer to the second die. The first conductive path extends directly through a first area of the PID layer directly between the first die and the second die. The POP structure further includes a second conductive path (103) from the first die through the PID layer to the second die. A particular portion (113) of the second conductive path is perpendicular to the first conductive path and extends through a second area of the PID layer not directly between the first die and the second die.
(FR) L'invention concerne une structure boîtier sur boîtier (POP). La structure POP comprend une première puce (116), une seconde puce (156) et une couche diélectrique photo-imagée (PID) (124). La couche PID est disposée entre la première puce et la seconde puce. La structure POP comprend également un premier chemin conducteur (162, 182) allant de la première puce à travers la couche PID vers la seconde puce. Le premier chemin conducteur s'étend directement à travers une première zone de la couche PID directement entre la première puce et la seconde puce. La structure POP comprend en outre un second chemin conducteur (103) allant de la première puce à travers la couche PID vers la seconde puce. Une partie particulière (113) du second chemin conducteur est perpendiculaire au premier chemin conducteur et s'étend à travers une seconde zone de la couche PID qui n'est pas directement entre la première puce et la seconde puce.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)