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1. (WO2016195881) READ AND WRITE APPARATUS AND METHOD FOR A DUAL PORT MEMORY
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2016/195881 International Application No.: PCT/US2016/030417
Publication Date: 08.12.2016 International Filing Date: 02.05.2016
IPC:
G11C 7/10 (2006.01) ,G11C 8/14 (2006.01) ,G11C 8/16 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
7
Arrangements for writing information into, or reading information out from, a digital store
10
Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
8
Arrangements for selecting an address in a digital store
14
Word line organisation; Word line lay-out
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
8
Arrangements for selecting an address in a digital store
16
Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Blvd. Santa Clara, CA 95054, US
Inventors:
KOLAR, Pramod; US
MA, Wei-Hsiang; US
PANDYA, Gunjan H.; US
Agent:
MUGHAL, Usman A.; US
Priority Data:
14/731,31904.06.2015US
Title (EN) READ AND WRITE APPARATUS AND METHOD FOR A DUAL PORT MEMORY
(FR) APPAREIL ET PROCÉDÉ DE LECTURE ET D'ÉCRITURE POUR UNE MÉMOIRE À DOUBLE PORT
Abstract:
(EN) Described is an apparatus which comprises: a memory array; first logic to detect whether first and second word-lines (WL) for a row of the memory array are active; and second logic to deactivate one of the first and second WLs such that one of the first and second WLs is active for the row.
(FR) La présente invention concerne un appareil qui comprend : une matrice mémoire ; des premiers circuits logiques pour détecter si des première et seconde lignes de mot (WL) pour une rangée de la matrice mémoire sont actives ; et des seconds circuits logiques pour désactiver l'une des première et seconde WL de sorte que l'une des première et seconde WL est active pour la rangée.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)