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1. (WO2016186322) NITRIDE-BASED DIODE ELEMENT COMPRISING VERTICAL CONTACT STRUCTURE AND PREPARATION METHOD THEREFOR
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2016/186322    International Application No.:    PCT/KR2016/003853
Publication Date: 24.11.2016 International Filing Date: 12.04.2016
IPC:
H01L 29/872 (2006.01), H01L 21/768 (2006.01), H01L 29/861 (2006.01), H01L 29/778 (2006.01)
Applicants: SEOUL SEMICONDUCTOR CO., LTD. [KR/KR]; 97-11, Sandan-ro 163beon-gil, Danwon-gu, Ansan-si, Gyeonggi-do 15429 (KR)
Inventors: KWAK, June Sik; (KR).
JONG, Young Do; (KR)
Agent: AIP PATENT & LAW FIRM; 30-1, Teheran-ro 14-gil, Gangnam-gu Seoul 06239 (KR)
Priority Data:
10-2015-0070860 21.05.2015 KR
Title (EN) NITRIDE-BASED DIODE ELEMENT COMPRISING VERTICAL CONTACT STRUCTURE AND PREPARATION METHOD THEREFOR
(FR) ÉLÉMENT DIODE À BASE DE NITRURE COMPRENANT UNE STRUCTURE DE CONTACT VERTICALE ET SON PROCÉDÉ DE PRÉPARATION
(KO) 수직형 컨택 구조를 구비하는 질화물계 다이오드 소자 및 이의 제조 방법
Abstract: front page image
(EN)A nitride-based diode element according to one embodiment comprises: a first nitride-based semiconductor pattern layer comprising a first plane and a second plane facing each other; and a first electrode pattern layer and a second electrode pattern layer arranged on the first plane of the first nitride-based semiconductor pattern layer, and respectively forming a Schottky contact and an Ohmic contact with the first nitride-based semiconductor pattern layer. In addition, the nitride-based diode element comprises: a second nitride-based first semiconductor pattern layer arranged on the second plane of the first nitride-based semiconductor pattern layer, and having an energy band gap different from that of the first nitride-based semiconductor pattern layer; a first electrode pad electrically connected to the first electrode pattern layer by a first vertical contact layer; and a second electrode pad electrically connected to the second electrode pattern layer by a second vertical contact layer, wherein the first electrode pad and the second electrode pad are arranged on opposite sides of each other in a vertical direction on the basis of the first nitride-based semiconductor pattern layer.
(FR)Selon un mode de réalisation, l'invention concerne un élément diode à base de nitrure comprenant : une première couche de motif semi-conducteur à base de nitrure comprenant un premier plan et un second plan se faisant mutuellement face ; et une première couche de motif d'électrode et une seconde couche de motif d'électrode agencées sur le premier plan de la première couche de motif semi-conducteur à base de nitrure, et formant respectivement un contact Schottky et un contact Ohmique avec la première couche de motif semi-conducteur à base de nitrure. En outre, l'élément diode à base de nitrure comprend : une seconde couche de motif semi-conducteur à base de nitrure disposée sur le second plan de la première couche de motif semi-conducteur à base de nitrure, et ayant un espace de bande d'énergie différent de celui de la première couche de motif semi-conducteur à base de nitrure ; une première pastille d'électrode connectée électriquement à la première couche de motif d'électrode par une première couche de contact verticale ; et une seconde pastille d'électrode connectée électriquement à la seconde couche de motif d'électrode par une seconde couche de contact verticale, la première pastille d'électrode et la seconde pastille d'électrode étant agencées sur des côtés opposés l'un à l'autre dans une direction verticale sur la base de la première couche de motif semi-conducteur à base de nitrure.
(KO)일 실시예에 따르는 질화물계 다이오드 소자는 서로 대향하는 제1 면 및 제2 면을 구비하는 제1 질화물계 반도체 패턴층, 및 상기 제1 질화물계 반도체 패턴층의 제1 면 상에 배치되고 상기 제1 질화물계 반도체 패턴층과 각각 쇼트키 접합 및 오믹 접합을 이루는 제1 전극 패턴층과 제2 전극 패턴층을 구비한다. 또한, 상기 질화물계 다이오드 소자는 상기 제1 질화물계 반도체 패턴층의 제2 면 상에 배치되고 상기 제1 질화물계 반도체 패턴층과 서로 다른 에너지 밴드갭을 구비하는 제2 질화물계 제1 반도체 패턴층, 상기 제1 전극 패턴층과 제1 수직형 컨택층에 의해 전기적으로 연결되는 제1 전극 패드, 및 상기 제2 전극 패턴층과 제2 수직형 컨택층에 의해 전기적으로 연결되는 제2 전극 패드를 포함한다. 이때, 상기 제1 전극 패드와 상기 제2 전극 패드는 상기 제1 질화물계 반도체 패턴층을 기준으로 상하 방향으로 서로 반대쪽에 배치된다.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG).
Publication Language: Korean (KO)
Filing Language: Korean (KO)