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1. WO2016186128 - SEMICONDUCTOR ELEMENT PACKAGE, SEMICONDUCTOR DEVICE, AND MOUNTING STRUCTURE

Publication Number WO/2016/186128
Publication Date 24.11.2016
International Application No. PCT/JP2016/064728
International Filing Date 18.05.2016
IPC
H01L 23/04 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
04characterised by the shape
H01L 23/12 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
CPC
H01L 2224/48091
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
4805Shape
4809Loop shape
48091Arched
H01L 23/04
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
04characterised by the shape ; of the container or parts, e.g. caps, walls
H01L 23/043
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
04characterised by the shape ; of the container or parts, e.g. caps, walls
043the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
H01L 23/057
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
04characterised by the shape ; of the container or parts, e.g. caps, walls
053the container being a hollow construction and having an insulating ; or insulated; base as a mounting for the semiconductor body
057the leads being parallel to the base
H01L 23/12
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
H01L 23/373
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
34Arrangements for cooling, heating, ventilating or temperature compensation ; ; Temperature sensing arrangements
36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
373Cooling facilitated by selection of materials for the device ; or materials for thermal expansion adaptation, e.g. carbon
Applicants
  • 京セラ株式会社 KYOCERA CORPORATION [JP]/[JP]
Inventors
  • 川頭 芳規 KAWAZU, Yoshiki
Priority Data
2015-10270520.05.2015JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR ELEMENT PACKAGE, SEMICONDUCTOR DEVICE, AND MOUNTING STRUCTURE
(FR) BOÎTIER D'ÉLÉMENT À SEMI-CONDUCTEURS, DISPOSITIF À SEMI-CONDUCTEURS ET STRUCTURE DE MONTAGE
(JA) 半導体素子パッケージ、半導体装置および実装構造体
Abstract
(EN) In the present invention, a semiconductor element package is provided with a substrate, a frame member, and a terminal member. The frame member is provided on the principal surface of the substrate, and a notch is formed on the substrate side of the frame member. The notch comprises a gap between the frame member and one principal surface of the substrate. The terminal member is provided so as to close off the notch comprising the gap. The terminal member includes a first dielectric layer, a plurality of signal line conductors and a plurality of coplanar ground conductor layers that are provided to one surface of the first dielectric layer, and a second dielectric layer. A hole is provided to the first dielectric layer so as to open into the region between a first line conductor and a second line conductor in the one surface.
(FR) La présente invention concerne un boîtier d'élément à semi-conducteurs, doté d'un substrat, d'un élément de cadre et d'un élément terminal. L'élément de cadre est disposé sur la surface principale du substrat et une encoche est formée sur le côté substrat de l'élément de cadre. L'encoche comprend un espace entre l'élément de cadre et une surface principale du substrat. L'élément terminal est prévu de manière à fermer l'encoche comprenant l'espace. L'élément terminal comprend une première couche diélectrique, une pluralité de conducteurs de lignes de signal et une pluralité de couches conductrices de terre coplanaires qui sont disposées sur une surface de la première couche diélectrique, ainsi qu'une seconde couche diélectrique. Un trou est fourni sur la première couche diélectrique de manière à s'ouvrir dans la région entre un premier conducteur de ligne et un second conducteur de ligne dans la au moins une surface.
(JA) 半導体素子パッケージは、基体と枠部材と端子部材とを備え、基体の主面に枠部材が設けられ、この枠部材の基体側には切り欠きが形成されている。切り欠きは、基体の一方主面と枠部材との間の間隙となり、端子部材は間隙となっている切り欠きを塞いで設けられている。端子部材は、第1誘電体層と、第1誘電体層の一表面に設けられる複数の信号配線導体および複数の同一面接地導体層と、第2誘電体層とを含む。第1誘電体層には、一表面の、第1配線導体と第2配線導体との間の領域に、開口する孔が設けられる。
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