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1. WO2016153779 - HIERARCHICAL COST BASED CACHING FOR ONLINE MEDIA

Publication Number WO/2016/153779
Publication Date 29.09.2016
International Application No. PCT/US2016/021421
International Filing Date 09.03.2016
IPC
G06F 12/12 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
12Replacement control
G06F 12/08 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
H04L 29/08 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
29Arrangements, apparatus, circuits or systems, not covered by a single one of groups H04L1/-H04L27/136
02Communication control; Communication processing
06characterised by a protocol
08Transmission control procedure, e.g. data link level control procedure
CPC
G06F 12/0811
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0806Multiuser, multiprocessor or multiprocessing cache systems
0811with multilevel cache hierarchies
G06F 12/0871
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0866for peripheral storage systems, e.g. disk cache
0871Allocation or management of cache space
G06F 12/0888
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0888using selective caching, e.g. bypass
G06F 12/121
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
12Replacement control
121using replacement algorithms
G06F 12/123
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
12Replacement control
121using replacement algorithms
123with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
G06F 2212/1016
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
10Providing a specific technical effect
1016Performance improvement
Applicants
  • ALCATEL LUCENT [FR]/[FR]
Inventors
  • AKHTAR, Shahid
Agents
  • DESAI, Niraj, A.
Priority Data
14/669,40826.03.2015US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) HIERARCHICAL COST BASED CACHING FOR ONLINE MEDIA
(FR) MISE EN CACHE HIÉRARCHIQUE FONDÉ SUR LE COÛT POUR SUPPORTS EN LIGNE
Abstract
(EN)
A method of operating a first cache device may include receiving, at the first cache device, a request to send a first asset to a second device; determining whether the first asset is stored at the first cache device; and when the determining determines that the first asset is not stored at the first cache device, obtaining, at the first cache device, the first asset, comparing, at the first cache device, a moving average of a marginal value of the first asset with respect to the first cache device and a characteristic marginal value of the first cache device, calculating a cost associated with the first asset, selectively storing the first asset at the first cache device based on the comparison, and sending the obtained first asset and the calculated cost to the second device.
(FR)
L'invention concerne un procédé d'exploitation d'un premier dispositif de cache pouvant comprendre de recevoir, au niveau du premier dispositif de cache, d'une demande d'envoi d'un premier bien à un second dispositif; déterminer si le premier bien est mémorisé ou non au niveau du premier dispositif de cache; et lorsqu'il est déterminé que le premier bien n'est pas mémorisé au niveau du premier dispositif de cache, obtenir, au niveau du premier dispositif de cache, le premier bien, comparer, au niveau du premier dispositif de cache, une moyenne mobile d'une valeur marginale du premier bien par rapport au premier dispositif de cache et une valeur marginale caractéristique du premier dispositif de cache, calculer un coût associé au premier bien, mémoriser sélectivement le premier bien au niveau du premier dispositif de cache en fonction de la comparaison et envoyer le premier bien obtenu et le coût calculé au second dispositif.
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