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1. (WO2016091314) ELECTROSTATIC BIPRISM
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PATENT CLAIMS

1 . Electrostatic biprism comprising a first conductive layer arranged on a second non-conductive layer, whereby at least one area of said first conductive layer forming the inner electrode is electrically isolated from two adjacent areas of said first conductive layer, whereby said inner electrode is formed as a freestanding electrode and whereby the first conductive layer is optionally coated with a metallic layer.

2. Electrostatic biprism according to claim 1 , whereby the first conductive layer is a mono or poly-crystalline layer.

3. Electrostatic biprism according claim 1 or 2, whereby the thickness of said first conductive layer defining the height of the inner electrode of the electrostatic biprism is between 10 nm and 1 mm, preferably between 0.1 μιτι and 10 μιτι and more preferably between 0.5 and 2 μιτι.

4. Electrostatic biprism according claims 1 to 3, whereby the thickness of said second non-conductive layer is between 1 nm and 100 μιτι, preferably between 25 nm and 500 nm and more preferably between 50 and 200 nm.

5. Electrostatic biprism according to any of the above claims, whereby the second non-conductive layer is arranged on a third substrate layer having a thickness of between 1 nm and 10 mm, preferably 100 nm and 5 mm and more preferably 500 μιτι and 1 mm.

6. Electrostatic biprism according to any of the above claims, whereby the area of the first conductive layer encompasses a form selected from the group consisting of a spiral, a circle, co-centric-circles and rectangle.

7. Electrostatic biprism according to any one of the above claims, whereby the separation between the area forming the inner electrode and the two

adjacent areas is expanded by a recess of the inner electrode and/or the adjacent areas.

8. Electrostatic biprism according claim 7, whereby the recess is rectangular, triangular or circular with a length L4, a width L1 and a breadth L2 of the remaining first conductive layer.

9. Electrostatic biprism according to claim 8, whereby said electrostatic biprism exhibits one or more of the following characteristics:

(a) the length L4 is in a range between 1 nm and 10 mm, preferably between 1 μιτι and 1 mm and most preferably between 1 μιτι and 200 μηη;

(b) the width L1 is in a range between 1 nm and 10 μιτι, preferably between 10 nm and 1 μιτι and most preferably between 50 nm and 500 nm;

(c) the breadth L2 of the remaining first conductive layer is in a range between 1 nm and 100 μιτι, preferably between 10 nm and 10 μιτι and most preferably between 50 nm and 500 nm.

10. Electrostatic biprism according to any one of above claims, whereby the substrate layer exhibits at least one cavity, preferably leaving the area forming the inner electrode uncovered from the support layer.

1 1 . Electrostatic biprism according to any of the above claims, whereby the Electrostatic prism contains 2 to 1000 areas of an inner electrode isolated from two adjacent areas of said first conductive layer, preferably 2 to 100 areas, more preferably 2 to 10 areas and most preferably 2 to 5 areas.

12. Electrostatic biprism according to any one of the above claims, whereby said electrostatic biprism exhibits one or more of the following characteristics:

(a) The metal layer consists of a metal selected from the group consisting of Al, AISi, Pt, Au and Ni;

(b) The first conductive layer consists of a material selected from the group consisting of Si, AISi, and Pt;

(c) The second non-conductive layer consists of a material selected from the group consisting of S1O2, Si3N4, and HfO2;

(d) The support layer consists of a material selected from the group consisting of mono- or polycrystalline silicon, GaAs, GaN, AI2O3, Pt and Al.

13. Method of producing an electrostatic biprism according to any one of the claims 1 to 12, comprising:

(a) providing a layer of a conductive material coated onto a layer of a non- conductive material, being preferably a silicon-on-insulator (SOI) substrate;

(a) performing a photo/electron beam lithographic process, optionally combined with etching and/or oxidation steps.

14. Method of producing an electrostatic biprism according claim 13, comprising:

(a) Provision of a silicon-on-insulator (SOI) substrate, whereby the silicon is preferably mono-crystalline silicon and the insulator is preferably S1O2; (b) Etching alignment marks on top of the silicon top layer;

(c) Etching the recessive area surrounding the area of the inner electrode into the Si top layer down to the buried insulator layer, being preferably a S1O2 layer;

(d) Oxidising the element to create a S1O2 layer on top of the silicon top layer;

(e) Etching at least one back side cavity into the substrate layer by chemical Si etching or deep reactive-ion (DRIE) etching;

(f) Performing an oxide isotropic etching by wet or vapour HF to remove accessible oxide layers in order to release the area of the inner electrode and the buried insulator layer between said area and the back-side cavity;

(g) Optionally depositing a metal layer on the surface of the silicon top layer.

15. Method of producing an electrostatic biprism according to any one of the claim 13, comprising:

(a) Provision of a mono- or polycrystalline silicon substrate layer;

(b) Oxidation of the top surface of the silicon substrate layer to generate a S1O2 layer as the second non-conductive layer,

(c) Deposition of a polycrystalline silicon layer on top of the non-conductive SiO2-layer by epitaxy or by low pressure chemical vapour deposition (LPCVD) to generate said first conductive layer;

(d) Etching alignment marks on top of the silicon top layer;

(e) Etching the recessive area surrounding the area of the inner electrode into the Si top layer down to the buried S1O2 insulator layer,

(f) Oxidising the element to create a S1O2 layer on top of the silicon top layer;

(g) Etching at least one back side cavity into the substrate layer by chemical Si etching or deep reactive-ion (DRIE) etching;

(h) Performing an oxide isotropic etching by wet or vapour HF to remove accessible oxide layers in order to release the area of the inner electrode and the buried S1O2 layer between said area and the backside cavity;

(i) Optionally depositing a metal layer on the surface of the silicon top layer.

16. Use of the electrostatic biprism according to any of the claims 1 to 12 as an electron beam device for electron holography, filtering energy, transmission electron microscopy, generation of vortex electron beams, aberration corrections or phase plate.

17. Electron beam device comprising an electrostatic biprism according to any of the claims 1 to 12.

18. Microscope or interferometer comprising an electrostatic biprism according to any of the claims 1 to 12 or an electron beam device according claim 17.