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1. (WO2016057883) FILL OSCILLATOR/CLOCK WITH AN FLL CONTROL LOOP

Pub. No.:    WO/2016/057883    International Application No.:    PCT/US2015/054864
Publication Date: Fri Apr 15 01:59:59 CEST 2016 International Filing Date: Sat Oct 10 01:59:59 CEST 2015
IPC: H03L 7/00
H03L 7/18
Applicants: TEXAN INSTRUMENTS INCORPORATED
TEXAS INSTRUMENTS JAPAN LIMITED
Inventors: J., Divyasree
KAMATH, Anant, Shankar
Title: FILL OSCILLATOR/CLOCK WITH AN FLL CONTROL LOOP
Abstract:
In described examples, an FLL (frequency locked loop) oscillator/clock generator (100) includes a free-running oscillator (110), which generates an FLL clk with an FLL-controlled frequency fosc- The FLL control loop includes a switched capacitor resistor divider (130) that converts fosc to a resistance, generating an FLL feedback voltage (Vfosc) to generate a loop control signal (OSC cntrl) input to the oscillator (110). In response, the oscillator frequency locks FLL clk to fosc. In an example implementation, the FLL oscillator/clock generator (100) operates with spread spectrum clocking (SSC) that provides triangular SSC modulation based on a truncated RC transition voltage generated as a negative feedback to an RC relaxation oscillator, with truncation based on switched tripping threshold voltages generated a positive feedback to the RC relaxation oscillator.