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1. (WO2016057567) METHODS AND SYSTEMS FOR SYNCHRONIZATION BETWEEN MULTIPLE CLOCK DOMAINS
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2016/057567 International Application No.: PCT/US2015/054311
Publication Date: 14.04.2016 International Filing Date: 06.10.2015
IPC:
G06F 1/12 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
1
Details not covered by groups G06F3/-G06F13/82
04
Generating or distributing clock signals or signals derived directly therefrom
12
Synchronisation of different clock signals
Applicants:
CORNELL UNIVERSITY [US/US]; 395 Pine Tree Road, Suite 310 Ithaca, NY 14850, US
Inventors:
MANOHAR, Rajit; US
JACKSON, Sandra, J.; US
Agent:
SATHE, Vinay; US
Priority Data:
62/060,54606.10.2014US
Title (EN) METHODS AND SYSTEMS FOR SYNCHRONIZATION BETWEEN MULTIPLE CLOCK DOMAINS
(FR) PROCÉDÉS ET SYSTÈMES DE SYNCHRONISATION ENTRE PLUSIEURS DOMAINES D'HORLOGE
Abstract:
(EN) A synchronization solution is described, which, in one aspect, allowed finer grained segmentation of clock domains on a chip. This solution incorporates computation into the synchronization overhead time and is called Gradual Synchronization. With Gradual Synchronization as a synchronization method, the design space of a chip could easily mix both asynchronous and synchronous blocks of logic, paving the way for wider use of asynchronous logic design.
(FR) L'invention concerne une solution de synchronisation qui, selon un aspect, permet une segmentation plus précise de domaines d'horloge sur une puce. Cette solution comprend un calcul pendant le délai de synchronisation et est appelée "synchronisation progressive". Lorsque la synchronisation progressive est utilisée comme procédé de synchronisation, l'espace de conception d'une puce peut facilement mélanger des blocs de logique asynchrones et synchrones, ce qui permet d'élargir l'utilisation d'une conception de logique asynchrone.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)