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1. WO2016018501 - CREST FACTOR REDUCTION

Publication Number WO/2016/018501
Publication Date 04.02.2016
International Application No. PCT/US2015/032833
International Filing Date 28.05.2015
Chapter 2 Demand Filed 08.03.2016
IPC
H04L 27/26 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
26Systems using multi-frequency codes
H04B 1/04 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
BTRANSMISSION
1Details of transmission systems, not covered by a single one of groups H04B3/-H04B13/123; Details of transmission systems not characterised by the medium used for transmission
02Transmitters
04Circuits
CPC
H03F 1/3258
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
1Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
32Modifications of amplifiers to reduce non-linear distortion
3241using predistortion circuits
3258based on polynomial terms
H03F 3/24
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
24of transmitter output stages
H04B 1/0475
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
BTRANSMISSION
1Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
02Transmitters
04Circuits
0475with means for limiting noise, interference or distortion
H04B 2201/70706
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
BTRANSMISSION
2201Indexing scheme relating to details of transmission systems not covered by a single group of H04B3/00 - H04B13/00
69Orthogonal indexing scheme relating to spread spectrum techniques in general
707relating to direct sequence modulation
70706with means for reducing the peak-to-average power ratio
H04L 27/2623
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
27Modulated-carrier systems
26Systems using multi-frequency codes
2601Multicarrier modulation systems
2614Peak power aspects
2623Reduction thereof by clipping
Applicants
  • XILINX, INC. [US]/[US]
Inventors
  • COPELAND, Gregory, C.
Agents
  • PARANDOOSH, David, A.
Priority Data
14/444,61228.07.2014US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) CREST FACTOR REDUCTION
(FR) RÉDUCTION DE FACTEUR DE CRÊTE
Abstract
(EN)
A system (200) for crest factor reduction (CFR) includes a peak detector (205) configured to receive an input signal (xk); a running maximum filter (210) configured to generate a scaling factor based on a window gain (Gk) and a filter length, wherein the window gain (Gk) is based on the input signal (Xk) and a threshold value (T); a window CFR gain filter (215) configured to generate a gain correction (Fk) based on the scaling factor and the filter length; a delay (225) configured to delay the input signal (Xk) to generate a delayed input signal; a multiplier (230) configured to multiply the gain correction (Fk) by the delayed input signal to obtain a peak correction value; and an adder (235) configured to determine an output signal (yk) based on the peak correction value and the delayed input signal.
(FR)
Un système (200) de réduction de facteur de crête (CFR) comprend :un détecteur de crête (205) configuré pour recevoir un signal d'entrée (xk) ; un filtre maximum d’exécution (210) configuré pour générer un facteur d’adaptation d’après un gain de fenêtre (Gk) et une longueur de filtre, le gain de fenêtre (Gk) étant basé sur le signal d'entrée (Xk) et une valeur de seuil (T) ; un filtre de gain CFR de fenêtre (215) configuré pour générer une correction de gain (Fk) d’après le facteur d’adaptation et la longueur du filtre ; un retard (225) configuré pour retarder le signal d'entrée (Xk) et générer un signal d'entrée retardé ; un multiplicateur (230) configuré pour multiplier la correction de gain (Fk) par le signal d'entrée retardé et obtenir une valeur de correction de crête ; et un additionneur (235) configuré pour déterminer un signal de sortie (yk) d’après la valeur de correction de crête et le signal d'entrée retardé.
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