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1. WO2015143715 - INTEGRATED CIRCUIT CHIP, EMBEDDED TYPE DEVICE AND INTEGRATED CIRCUIT PROCESSING METHOD

Publication Number WO/2015/143715
Publication Date 01.10.2015
International Application No. PCT/CN2014/074300
International Filing Date 28.03.2014
IPC
H01L 23/495 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488consisting of soldered or bonded constructions
495Lead-frames
CPC
H01L 2224/48091
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
4805Shape
4809Loop shape
48091Arched
H01L 2225/107
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2225Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00
10the devices having separate containers
1005the devices being of a type provided for in group H01L27/00
1011the containers being in a stacked arrangement
1047Details of electrical connections between containers
107Indirect electrical connections, e.g. via an interposer, a flexible substrate, using TAB
H01L 2225/1088
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2225Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00
10the devices having separate containers
1005the devices being of a type provided for in group H01L27/00
1011the containers being in a stacked arrangement
1076Shape of the containers
1088Arrangements to limit the height of the assembly
H01L 23/49513
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; ; Selection of materials therefor
488consisting of soldered ; or bonded; constructions
495Lead-frames ; or other flat leads
49503characterised by the die pad
49513having bonding material between chip and die pad
H01L 23/49541
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; ; Selection of materials therefor
488consisting of soldered ; or bonded; constructions
495Lead-frames ; or other flat leads
49541Geometry of the lead-frame
H01L 23/49575
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; ; Selection of materials therefor
488consisting of soldered ; or bonded; constructions
495Lead-frames ; or other flat leads
49575Assemblies of semiconductor devices on lead frames
Applicants
  • 深圳市江波龙电子有限公司 SHENZHEN NETCOM ELECTRONICS CO., LTD. [CN]/[CN]
Inventors
  • 李志雄 LI, Zhixiong
  • 李中政 LI, Zhongzheng
  • 胡宏辉 HU, Honghui
Agents
  • 广州华进联合专利商标代理有限公司 ADVANCE CHINA IP LAW OFFICE
Priority Data
Publication Language Chinese (zh)
Filing Language Chinese (ZH)
Designated States
Title
(EN) INTEGRATED CIRCUIT CHIP, EMBEDDED TYPE DEVICE AND INTEGRATED CIRCUIT PROCESSING METHOD
(FR) PUCE DE CIRCUIT INTÉGRÉ, DISPOSITIF DU TYPE ENCASTRÉ ET PROCÉDÉ DE TRAITEMENT DE CIRCUIT INTÉGRÉ
(ZH) 集成电路芯片、嵌入式设备及集成电路加工方法
Abstract
(EN) An integrated circuit chip, an embedded type device and an integrated circuit processing method. The integrated circuit chip comprises a first chip and a conducting wire frame, wherein the first chip comprises a substrate, integrated circuit grains and/or passive elements arranged on an upper surface of the substrate, and an encapsulation colloid coating the upper surface of the substrate, the integrated circuit grains and/or the passive elements. A lower surface of the substrate is exposed outside the encapsulation colloid, a plurality of bonding pads are arranged on the lower surface of the substrate, and the plurality of bonding pads are electrically connected to the integrated circuit grains and/or the passive elements in the encapsulation colloid through a conducting circuit on the substrate. The conducting wire frame comprises chip pins, wherein the chip pins are electrically connected to the bonding pads. Due to the fact that only one surface of the substrate is encapsulated into the encapsulation colloid, only the heat expansion coefficients of two materials, i.e. the substrate and the encapsulation colloid need to be taken into consideration, the adjustment is facilitated, and therefore the processed integrated circuit chip is more stable and reliable.
(FR) L'invention concerne une puce de circuit intégré, un dispositif du type encastré et un procédé de traitement de circuit intégré. La puce de circuit intégré comprend une première puce et une grille de connexion, la première puce comprenant un substrat, des grains de circuit intégré et/ou des éléments passifs agencés sur une surface supérieure du substrat, et un colloïde d'encapsulation revêtant la surface supérieure du substrat, les grains de circuit intégré et/ou les éléments passifs. Une surface inférieure du substrat est exposée à l'extérieur du colloïde d'encapsulation, une pluralité de plages de connexion sont agencées sur la surface inférieure du substrat, et la pluralité de plages de connexion sont électriquement connectées aux grains de circuit intégré et/ou aux éléments passifs présents dans le colloïde d'encapsulation par l'intermédiaire d'un circuit conducteur sur le substrat. La grille de connexion comprend des broches de puce, les broches de puce étant électriquement connectées aux plages de connexion. En raison du fait qu'une seule surface du substrat est encapsulée dans le colloïde d'encapsulation, il suffit de prendre en considération les coefficients de dilatation thermique de deux matériaux seulement, à savoir le substrat et le colloïde d'encapsulation, l'adaptation est facilitée, et par conséquent la puce de circuit intégré traitée est plus stable et fiable.
(ZH) 一种集成电路芯片、嵌入式设备及集成电路加工方法。所述集成电路芯片,包括第一芯片和导线架,所述第一芯片包括基板、设置在所述基板上表面的集成电路晶粒和/或被动元件,以及包覆所述基板上表面、集成电路晶粒和/或被动元件的封装胶体,所述基板下表面暴露在所述封装胶体外,所述基板下表面上设置有多个焊盘,所述多个焊盘通过所述基板上的导电线路与所述封装胶体内的所述集成电路晶粒和/或被动元件电连接;所述导线架包括芯片管脚,所述芯片管脚电连接至所述焊盘。因只将基板的一个面封装在封装胶体的内部,只需考虑基板和封装胶体两种材质的热膨胀系数,便于调节,从而使加工出来的集成电路芯片更加稳定可靠。
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