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1. WO2015142591 - FACE-UP SUBSTRATE INTEGRATION WITH SOLDER BALL CONNECTION IN SEMICONDUCTOR PACKAGE

Publication Number WO/2015/142591
Publication Date 24.09.2015
International Application No. PCT/US2015/020021
International Filing Date 11.03.2015
Chapter 2 Demand Filed 18.01.2016
IPC
H05K 1/02 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
H05K 1/14 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
14Structural association of two or more printed circuits
H05K 3/36 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
36Assembling printed circuits with other printed circuits
H01L 23/48 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 27/01 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
01comprising only passive thin-film or thick-film elements formed on a common insulating substrate
H01L 23/538 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
538the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
CPC
H01L 2224/11
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
11Manufacturing methods
H01L 23/48
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; ; Selection of materials therefor
H01L 23/5385
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
538the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
5385Assembly of a plurality of insulating substrates
H01L 23/645
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
58Structural electrical arrangements for semiconductor devices not otherwise provided for ; , e.g. in combination with batteries
64Impedance arrangements
645Inductive arrangements
H01L 2924/00
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
H01L 2924/0002
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
0001Technical content checked by a classifier
0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Applicants
  • QUALCOMM INCORPORATED [US]/[US]
Inventors
  • KIM, Daeik Daniel
  • KIM, Jonghae
  • ZUO, Chengjie
  • YUN, Changhan Hobie
  • VELEZ, Mario Francisco
  • MIKULKA, Robert Paul
Agents
  • OLDS, Mark E.
Priority Data
14/220,91320.03.2014US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) FACE-UP SUBSTRATE INTEGRATION WITH SOLDER BALL CONNECTION IN SEMICONDUCTOR PACKAGE
(FR) INTÉGRATION DE SUBSTRAT FACE VERS LE HAUT AVEC CONNEXION PAR BILLE DE SOUDURE DANS UN BOÎTIER DE SEMI-CONDUCTEUR
Abstract
(EN) FACE-UP SUBSTRATE INTEGRATION WITH SOLDER BALL CONNECTION IN SEMICONDUCTOR PACKAGE Systems and methods relate to a semiconductor package 200 comprising a first substrate or a 2D passive-on-glass (POG) structure with a passive component 204 and a first set of one or more package pads 203 formed on a face of a glass substrate 202. The semiconductor package also includes a second or laminate substrate 207 with a second set of one or more package pads 205 formed on a face of the second or laminate substrate. Solder balls 206 are dropped, configured to contact the first set of one or more package pads with the second set of one or more package pads, wherein the first substrate or the 2D POG structure is placed face-up on the face of the second or laminate substrate. A printed circuit board (PCB) 208 can be coupled to a bottom side of the second or laminate substrate.
(FR) INTÉGRATION DE SUBSTRAT FACE VERS LE HAUT AVEC CONNEXION PAR BILLE DE SOUDURE DANS UN BOÎTIER DE SEMI-CONDUCTEUR. L'invention concerne des systèmes et des procédés qui se rapportent à un boîtier de semi-conducteur (200) comprenant un premier substrat ou une structure passive sur verre (POG pour Passive-On-Glass) en 2D, un composant passif (204) et un premier ensemble d'un ou plusieurs plots de connexion de boîtier (203) formés sur une face d'un substrat de verre (202). Le boîtier de semi-conducteur comprend également un second substrat ou un substrat stratifié (207), un second ensemble d'un ou plusieurs plots de connexion de boîtier (205) formés sur une face du second substrat ou du substrat stratifié. Des billes de soudure (206) sont déposées, configurées de sorte à mettre en contact le premier ensemble d'un ou plusieurs plots de connexion de boîtier avec le second ensemble d'un ou plusieurs plots de connexion de boîtier, le premier substrat ou la structure POG en 2D est placé, ou placée, face vers le haut sur la face du second substrat ou du substrat stratifié. Une carte de circuit imprimé (208) peut être couplée à un côté inférieur du second substrat ou du substrat stratifié.
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