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1. (WO2015117102) METHOD AND APPARATUS FOR LOW POWER CHIP-TO-CHIP COMMUNICATIONS WITH CONSTRAINED ISI RATIO
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2015/117102 International Application No.: PCT/US2015/014147
Publication Date: 06.08.2015 International Filing Date: 02.02.2015
IPC:
H04L 25/14 (2006.01) ,H04L 25/49 (2006.01) ,H04L 25/02 (2006.01)
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
25
Baseband systems
02
Details
14
Channel dividing arrangements
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
25
Baseband systems
38
Synchronous or start-stop systems, e.g. for Baudot code
40
Transmitting circuits; Receiving circuits
49
using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
25
Baseband systems
02
Details
Applicants:
KANDOU LABS SA [CH/CH]; EPFL Innovation Park Building I CH-1015 Lausanne, CH
INVENTION MINE LLC [US/US]; 200 South Wacker Drive Suite 3100 Chicago, Illinois 60606, US (SC)
Inventors:
HORMATI, Ali; CH
SHOKROLLAHI, Amin; CH
ULRICH, Roger; CH
Agent:
IRVINE, Robert; US
Priority Data:
61/934,80402.02.2014US
Title (EN) METHOD AND APPARATUS FOR LOW POWER CHIP-TO-CHIP COMMUNICATIONS WITH CONSTRAINED ISI RATIO
(FR) PROCÉDÉ ET APPAREIL POUR COMMUNICATIONS PUCE À PUCE DE FAIBLE PUISSANCE À RAPPORT ISI CONTRAINT
Abstract:
(EN) An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herein called the "ISI Ratio" are described which permit higher communications speed, lower system power consumption, and reduced implementation complexity.
(FR) La présente invention concerne un appareil de communication efficace pour un code de signalisation vectorielle en vue de transporter des données et éventuellement un signal d'horloge entre des dispositifs à circuits intégrés. L'invention concerne également des procédés de conception d'un tel appareil et de ses codes associés sur la base d'un nouvel indicateur dénommé « rapport ISI » qui permettent une vitesse de communication plus élevée, une consommation en puissance de système inférieure, et une complexité de mise en œuvre réduite.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)