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1. (WO2015116670) AUTO-PHASE SYNCHRONIZATION IN DELAY LOCKED LOOPS

Pub. No.:    WO/2015/116670    International Application No.:    PCT/US2015/013273
Publication Date: Fri Aug 07 01:59:59 CEST 2015 International Filing Date: Thu Jan 29 00:59:59 CET 2015
IPC: H03L 7/081
H03L 7/07
Applicants: SANDISK TECHNOLOGIES LLC
Inventors: ODEDARA, Bhavin
PANCHOLI, Deepak
RUSTAGI, Vishal
Title: AUTO-PHASE SYNCHRONIZATION IN DELAY LOCKED LOOPS
Abstract:
Tuning circuitry may include a controller that is configured to determine a phase difference for a pair of signals generated at different points in a master delay line of a master-slave delay locked loop (DLL) circuit. One of signals of the pair may be communicated through a slave delay line of the master-slave DLL circuit before the phase difference is determined. A programming delay value used to set a phase delay of the slave delay line may be adjusted or tuned based on the phase difference.