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1. WO2015080245 - METHOD FOR PRODUCING CIRCUIT BOARD, AND CIRCUIT BOARD

Publication Number WO/2015/080245
Publication Date 04.06.2015
International Application No. PCT/JP2014/081541
International Filing Date 28.11.2014
IPC
H05K 3/06 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
02in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
06the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
C23F 1/20 2006.01
CCHEMISTRY; METALLURGY
23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACES; INHIBITING CORROSION OF METALLIC MATERIAL; INHIBITING INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25247
1Etching metallic material by chemical means
10Etching compositions
14Aqueous compositions
16Acidic compositions
20for etching aluminium or alloys thereof
CPC
C23F 1/20
CCHEMISTRY; METALLURGY
23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE
1Etching metallic material by chemical means
10Etching compositions
14Aqueous compositions
16Acidic compositions
20for etching aluminium or alloys thereof
H05K 1/0306
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
03Use of materials for the substrate
0306Inorganic insulating substrates, e.g. ceramic, glass
H05K 1/032
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
03Use of materials for the substrate
0313Organic insulating material
032consisting of one material
H05K 1/092
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
09Use of materials for the ; conductive, e.g. ; metallic pattern
092Dispersed materials, e.g. conductive pastes or inks
H05K 2201/017
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
01Dielectrics
0137Materials
017Glass ceramic coating, e.g. formed on inorganic substrate
H05K 2203/0384
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2203Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
03Metal processing
0384Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer
Applicants
  • 東洋アルミニウム株式会社 TOYO ALUMINIUM KABUSHIKI KAISHA [JP]/[JP]
Inventors
  • 辻 孝輔 TSUJI, Kosuke
  • 小池 和徳 KOIKE, Kazunori
  • 川島 桂 KAWASHIMA, Katsura
  • 土屋 權壽 TSUCHIYA, Kenju
  • 今井 信治 IMAI, Shinji
Agents
  • 特許業務法人深見特許事務所 FUKAMI PATENT OFFICE, P.C.
Priority Data
2013-24641428.11.2013JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) METHOD FOR PRODUCING CIRCUIT BOARD, AND CIRCUIT BOARD
(FR) PROCÉDÉ DE PRODUCTION DE CARTE DE CIRCUIT, ET CARTE DE CIRCUIT
(JA) 回路基板の製造方法および回路基板
Abstract
(EN)
The present invention pertains to a method for producing a circuit board, the method involving a step for preparing a substrate which contains silicon at least on the surface, a step for coating the substrate with a paste(4) containing aluminum particles, a step for forming a conductive layer (5) on the substrate by sintering the substrate coated with the paste (4), a step for forming a resist film (6) having a specific pattern on the conductive layer (5), and a step for removing the conductive layer (5) on a section, on which the resist film is not formed, by means of an etching solution, wherein the etching solution contains a fluoride ion and a metal ion of a metal (M) having a greater standard electrode potential than the standard electrode potential of aluminum. The present invention also pertains to a circuit board that could be produced by means of the aforementioned method.
(FR)
La présente invention concerne un procédé de production de carte de circuit, le procédé comprenant : une étape de préparation d'un substrat contenant du silicium au moins sur la surface ; une étape de recouvrement du substrat par une pâte (4) contenant des particules d'aluminium ; une étape de formation d'une couche conductrice (5) sur le substrat par frittage du substrat recouvert de la pâte (4) ; une étape de formation d'un film réserve (6) à motif spécifique sur la couche conductrice (5) ; et une étape de retrait de la couche conductrice (5) sur une section, sur laquelle le film réserve n'est pas formé, au moyen d'une solution de gravure, la solution de gravure contenant un ion fluorure et un ion métallique d'un métal (M) présentant un potentiel d'électrode standard supérieur au potentiel d'électrode standard de l'aluminium. La présente invention concerne également une carte de circuit pouvant être produite au moyen du procédé susmentionné.
(JA)
 本発明は、少なくとも表面にケイ素を含有する基板を準備する工程、該基板上にアルミニウム粒子を含むペースト(4)を塗布する工程、該ペースト(4)を塗布した該基板を焼成することにより該基板上に導体層(5)を形成する工程、該導体層(5)上に特定パターンのレジスト膜(6)を形成する工程、および該レジスト膜(6)が形成されていない部分の該導体層(5)をエッチング液により除去する工程を含む回路基板の製造方法であって、該エッチング液は、標準電極電位がアルミニウムの標準電極電位より大きな値をとる金属Mの金属イオンとフッ化物イオンとを含む、回路基板の製造方法およびそのような方法により製造しうる回路基板に係わる。
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