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1. (WO2015047321) PREVIOUS LAYER SELF-ALIGNED VIA AND PLUG PATTERNING FOR BACK END OF LINE (BEOL) INTERCONNECTS

Pub. No.:    WO/2015/047321    International Application No.:    PCT/US2013/062327
Publication Date: Fri Apr 03 01:59:59 CEST 2015 International Filing Date: Sat Sep 28 01:59:59 CEST 2013
IPC: H01L 21/3205
H01L 21/28
Applicants: INTEL CORPORATION
Inventors: WALLACE, Charles H.
NYHUS, Paul A.
TAN, Elliot N.
SIVAKUMAR, Swaminathan
Title: PREVIOUS LAYER SELF-ALIGNED VIA AND PLUG PATTERNING FOR BACK END OF LINE (BEOL) INTERCONNECTS
Abstract:
Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects are described. In an example, an interconnect structure for an integrated circuit includes a first layer disposed above a substrate. The first layer of the interconnect structure includes a grating of alternating metal lines and dielectric lines in a first direction. A second layer of the interconnect structure is disposed above the first layer. The second layer includes a grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. Each metal line of the grating of the second layer is disposed on a recessed dielectric line composed of alternating distinct regions of a first dielectric material and a second dielectric material corresponding to the alternating metal lines and dielectric lines of the first layer of the interconnect structure.