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1. (WO2015043315) ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2015/043315 International Application No.: PCT/CN2014/083562
Publication Date: 02.04.2015 International Filing Date: 01.08.2014
IPC:
H01L 27/12 (2006.01) ,H01L 21/77 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
Applicants:
京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN/CN]; 中国北京市 朝阳区酒仙桥路10号 No.10 Jiuxianqiao Rd., Chaoyang District Beijing 100015, CN
北京京东方显示技术有限公司 BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. [CN/CN]; 中国北京市 经济技术开发区经海一路118号 No.118 Jinghaiyilu, BDA Beijing 100176, CN
Inventors:
蔡振飞 CAI, Zhenfei; CN
罗丽平 LUO, Liping; CN
郝昭慧 HAO, Zhaohui; CN
Agent:
北京市柳沈律师事务所 LIU, SHEN & ASSOCIATES; 中国北京市海淀区彩和坊路10号1号楼10层 10th Floor, Building 1, 10 Caihefang Road, Haidian District Beijing 100080, CN
Priority Data:
201310455200.129.09.2013CN
Title (EN) ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE
(FR) SUBSTRAT DE MATRICE ET SON PROCÉDÉ DE FABRICATION ET DISPOSITIF D'AFFICHAGE
(ZH) 阵列基板及其制造方法、显示装置
Abstract:
(EN) Disclosed are an array substrate and a manufacturing method therefor, and a display device. The array substrate comprises: an underlayment substrate; and a plurality of data lines (1) arranged on the underlayment substrate. The underlayment substrate comprises a plurality of fitting regions (2) fitted with the end portion of each data line (1) and non-fitting regions (3) located between adjacent fitting regions (2), a height-increasing layer (6) being arranged between a passivation layer (5) in the non-fitting regions (3) and the underlayment substrate. A height-increasing layer (6) is added between a passivation layer (5) in a non-fitting region (3) and an underlayment substrate, the height difference between a passivation layer in a fitting region and the passivation layer in the non-fitting region is reduced or eliminated, thereby solving the problem that the passivation layers falls off, and improving the reliability of products.
(FR) L'invention concerne un substrat de matrice et son procédé de fabrication et un dispositif d'affichage. Le substrat de matrice comprend : un substrat de sous-couche ; et une pluralité de lignes de données (1) agencées sur le substrat de sous-couche. Le substrat de sous-couche comprend une pluralité de zones d'insertion (2) dans lesquelles sont insérées les parties d'extrémités de chacune des lignes de données (1) et des zones de non-insertion (3) situées entre les zones d'insertion (2) adjacentes, une couche d'accroissement de hauteur (6) étant agencée entre une couche de passivation (5) dans les zones de non-insertion (3) et le substrat de sous-couche. Une couche d'accroissement de hauteur (6) est ajoutée entre une couche de passivation (5) dans une zone de non-insertion (3) et un substrat de sous-couche, la différence de hauteur entre une couche de passivation dans une zone d'insertion et de la couche de passivation dans la zone de non-insertion étant réduite ou éliminée, résolvant ainsi le problème de chute des couches de passivation et améliorant la fiabilité des produits.
(ZH) 公开一种阵列基板及其制造方法、显示装置。该阵列基板包括:衬底基板;以及设置在所述衬底基板上的多条数据线(1)。衬底基板包括与各条数据线(1)的端部相贴合的多个贴合区域(2)和位于相邻贴合区域之间的非贴合区域(3),所述非贴合区域(3)中的钝化层(5)与衬底基板之间设置有增高层(6)。通过在非贴合区域(3)中的钝化层(5)与衬底基板之间增加增高层(6),从而减少或者消除贴合区域中的钝化层与非贴合区域中的钝化层高度差异,以解决钝化层脱落问题,提高了产品的可靠性。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)