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1. (WO2015043102) CELL STRUCTURE OF VDMOS DEVICE AND MANUFACTURING METHOD THEREFOR

Pub. No.:    WO/2015/043102    International Application No.:    PCT/CN2013/091144
Publication Date: Fri Apr 03 01:59:59 CEST 2015 International Filing Date: Wed Jan 01 00:59:59 CET 2014
IPC: H01L 29/78
H01L 21/336
Applicants: WUXI CHINA RESOURCES HUAJING MICROELECTRONICS CO., LTD.
无锡华润华晶微电子有限公司
Inventors: TANG, Hongxiang
唐红祥
SUN, Yongsheng
孙永生
JI, Jianxin
计建新
WANG, Guoping
王国平
Title: CELL STRUCTURE OF VDMOS DEVICE AND MANUFACTURING METHOD THEREFOR
Abstract:
A cell structure of a VDMOS device and a manufacturing method therefor are provided. The cell structure comprises: a drain region (601); an epitaxial layer (602) positioned on the drain region; trenches positioned in the epitaxial layer; field oxide layers (604, 611) lined on the inner walls of the trenches; conductive layers (603, 612) lined on the inner walls of the field oxide layers; gate structures (607, 608) positioned on the epitaxial layer; a first well region (605) and a second well region (610) positioned in the epitaxial layer and between the trenches, and a first source region (606) embedded in the first well region and a second source region (609) embedded in the second well region. By adding the field oxide layers and the conductive layers on the basis of the cell structure of a planar gate VDMOS device, the conduction resistance of the cell structure of the VDMOS device can be effectively reduced.