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1. WO2014209765 - I/O DRIVER TRANSMIT SWING CONTROL

Publication Number WO/2014/209765
Publication Date 31.12.2014
International Application No. PCT/US2014/043285
International Filing Date 19.06.2014
IPC
H03K 19/0175 2006.1
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
0175Coupling arrangements; Interface arrangements
H04L 25/02 2006.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
25Baseband systems
02Details
CPC
G11C 2207/105
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
2207Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
10Aspects relating to interfaces of memory device to external buses
105Aspects related to pads, pins or terminals
G11C 29/022
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
022in I/O circuitry
G11C 29/025
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
025in signal lines
G11C 29/028
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
028with adaption or trimming of parameters
G11C 7/1057
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
1057Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
H02M 3/158
HELECTRICITY
02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
3Conversion of dc power input into dc power output
02without intermediate conversion into ac
04by static converters
10using discharge tubes with control electrode or semiconductor devices with control electrode
145using devices of a triode or transistor type requiring continuous application of a control signal
155using semiconductor devices only
156with automatic control of output voltage or current, e.g. switching regulators
158including plural semiconductor devices as final control devices for a single load
Applicants
  • INTEL CORPORATION [US]/[US]
Inventors
  • MOZAK, Christopher P.
  • TRIVEDI, Ritesh B.
  • MCCALL, James A.
  • MARTIN, Aaron
Agents
  • MALLIE, Michael J.
Priority Data
13/931,60428.06.2013US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) I/O DRIVER TRANSMIT SWING CONTROL
(FR) COMMANDE D'EXCURSION DE TRANSMISSION D’ÉLÉMENT DE COMMANDE E/S
Abstract
(EN) A transmission line interface circuit includes a voltage regulator to control a voltage swing of the transmission line interface circuit for signal transmission. The transmission line interface circuit includes complementary driver elements, including a p-type driver element to pull up the transmission line in response to a logic high, and an n-type driver element to pull down the transmission line in response to a logic low. The voltage regulator is coupled between one of the driver elements and a respective voltage reference to reduce a voltage swing of the transmission line interface circuit.
(FR) L'invention concerne un circuit d'interface de ligne de transmission qui comprend un régulateur de tension pour commander une excursion de tension du circuit d'interface de ligne de transmission pour la transmission de signaux. Le circuit d'interface de ligne de transmission comprend des éléments de commande complémentaires, comprenant un élément de commande de type p pour tirer vers le haut la ligne de transmission en réponse à un niveau logique haut, et un élément de commande de type n pour de tirer vers le bas la ligne de transmission en réponse à un niveau logique bas. Le régulateur de tension est couplé entre l'un des éléments de commande et une tension de référence correspondante pour réduire une excursion de tension du circuit d'interface de ligne de transmission.
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