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1. (WO2014208010) MICROWAVE CIRCUIT
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2014/208010 International Application No.: PCT/JP2014/002933
Publication Date: 31.12.2014 International Filing Date: 03.06.2014
IPC:
H01L 23/12 (2006.01) ,H01L 25/10 (2006.01) ,H01L 25/11 (2006.01) ,H01L 25/18 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
10
the devices having separate containers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
10
the devices having separate containers
11
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18
the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
Applicants:
パナソニックIPマネジメント株式会社 PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD. [JP/JP]; 大阪府大阪市中央区城見2丁目1番61号 1-61, Shiromi 2-chome, Chuo-ku, Osaka-shi, Osaka 5406207, JP
Inventors:
藤田 卓 FUJITA, Suguru; null
中村 真木 NAKAMURA, Maki; null
Agent:
藤井 兼太郎 FUJII, Kentaro; 大阪府大阪市中央区城見2丁目1番61号 パナソニックIPマネジメント株式会社内 c/o Panasonic Intellectual Property Management Co., Ltd. 1-61, Shiromi 2-chome, Chuo-ku, Osaka-shi, Osaka 5406207, JP
Priority Data:
2013-13292825.06.2013JP
Title (EN) MICROWAVE CIRCUIT
(FR) CIRCUIT HYPERFRÉQUENCE
(JA) マイクロ波回路
Abstract:
(EN) Provided is a microwave circuit whereby the size of a module having the microwave circuit mounted therein can be reduced, while suppressing generation of cracks in a substrate. The microwave circuit is provided with: a first substrate, i.e., a multilayer substrate; a second substrate facing the first substrate; a plurality of first conductive members that electrically connect a first layer of the first substrate and the second substrate to each other; a plurality of second conductive members, which electrically connect the first layer of the first substrate and another layer of the first substrate to each other, and which have a shorter diameter than a diameter of the first conductive members; and transmission lines that connect the first conductive members and the second conductive members to each other. The first conductive members and the second conductive members are alternately disposed along an end portion of the first substrate.
(FR) L'invention concerne un circuit hyperfréquence tel que la taille d'un module dans lequel est monté le circuit hyperfréquence peut être réduite, tout en supprimant la génération de fissures dans un substrat. Le circuit hyperfréquence comporte : un premier substrat, qui est un substrat multicouche ; un second substrat faisant face au premier substrat ; une pluralité de premiers organes conducteurs qui connectent électriquement une première couche du premier substrat et le second substrat entre eux ; une pluralité de seconds organes conducteurs, lesquels connectent électriquement la première couche du premier substrat et une autre couche du premier substrat entre elles, et ont un diamètre inférieur à un diamètre des premiers organes conducteurs ; et des lignes de transmission qui connectent les premiers organes conducteurs et les seconds organes conducteurs entre eux. Les premiers organes conducteurs et les seconds organes conducteurs sont disposés alternativement le long d'une partie d'extrémité du premier substrat.
(JA) 基板のクラックの発生を抑制しつつ、マイクロ波回路が搭載されるモジュールを小型化できるマイクロ波回路を提供する。多層基板である第1基板と、第1基板と対向する第2基板と、第1基板の第1層と第2基板とを電気的に接続する複数の第1の導電性部材と、第1基板の第1層と第1基板の他層とを電気的に接続し、第1の導電性部材の径よりも短い径を有する複数の第2の導電性部材と、第1の導電性部材と第2の導電性部材とを接続する伝送線路と、を備え、複数の第1の導電性部材及び複数の第2の導電性部材は、第1基板の端部に沿って、交互に配置される。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)