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|1. (WO2014206191) METHOD FOR MANUFACTURING NON-PUNCH THROUGH INSULATED GATE BIPOLAR TRANSISTOR|
|Applicants:||CSMC TECHNOLOGIES FAB1 CO., LTD.
|Title:||METHOD FOR MANUFACTURING NON-PUNCH THROUGH INSULATED GATE BIPOLAR TRANSISTOR|
A method for manufacturing a non-punch through insulated gate bipolar transistor. The method comprises the following steps: forming an insulated gate bipolar transistor structure on the front surface of a silicon wafer until accumulation and deposit of an interlayer medium is completed; covering a protective film on the interlayer medium; thinning the silicon wafer from the back surface of the silicon wafer, and forming a P-type layer on the back surface of the thinned silicon wafer; removing the protective film and annealing the silicon wafer, wherein the annealing temperature is higher than 500 degrees centigrade; and forming a metal layer on the P-type layer and the surface of the interlayer medium. In the above-mentioned method, because the P-type layer is annealed before the metal layer is formed, the annealing temperature of the P-type layer will not be limited by a metal melting temperature, and a higher temperature can be used to anneal, such that the formed NPT IGBT has higher performance. Meanwhile, the method is compatible with the traditional process, so that the efficiency is higher.