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1. (WO2014201415) METAL-INSULATOR-METAL CAPACITOR STRUCTURES
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2014/201415 International Application No.: PCT/US2014/042404
Publication Date: 18.12.2014 International Filing Date: 13.06.2014
Chapter 2 Demand Filed: 11.04.2015
IPC:
H01L 49/02 (2006.01) ,H01L 27/08 (2006.01) ,H01L 23/522 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49
Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
02
Thin-film or thick-film devices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
08
including only semiconductor components of a single kind
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
522
including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
Applicants:
QUALCOMM INCORPORATED [US/US]; Attn: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors:
JAKUSHOKAS, Renatas; US
SRINIVAS, Vaishnav; US
KIM, Robert Won Chol; US
Agent:
LANGTON, Grant T.; US
WORLEY, Eugene R.; Novak Druce Connolly Bove + Quigg LLP 333 S. Grand Ave. 23F Los Angeles, CA 90071, US
Priority Data:
13/917,54913.06.2013US
Title (EN) METAL-INSULATOR-METAL CAPACITOR STRUCTURES
(FR) STRUCTURES DE CONDENSATEUR MÉTAL-ISOLANT-MÉTAL
Abstract:
(EN) Capacitor structures capable of providing both low-voltage capacitors and high-voltage capacitors are described herein. In one embodiment, a capacitor structure comprises a low-voltage capacitor and a high-voltage capacitor. The low-voltage capacitor comprises a first electrode formed from a first metal layer, a second electrode formed from a second metal layer, a third electrode formed from a third metal layer, a first dielectric layer between the first and second electrodes, and a second dielectric layer between the second and third electrodes. The high-voltage capacitor comprises a fourth electrode formed from the first metal layer, a fifth electrode formed from the third metal layer, and a third dielectric layer between the fourth and fifth electrodes, wherein the third dielectric layer is thicker than either the first dielectric layer or the second dielectric layer.
(FR) L'invention concerne des structures de condensateur capables de former des condensateurs basse tension et des condensateurs haute tension. Dans un mode de réalisation, une structure de condensateur comprend un condensateur basse tension et un condensateur haute tension. Le condensateur basse tension comprend une première électrode formée d'une première couche de métal, une deuxième électrode formée d'une deuxième couche de métal, une troisième électrode formée d'une troisième couche de métal, une première couche diélectrique entre les première et deuxième électrodes, et une deuxième couche diélectrique entre les deuxième et troisième électrodes. Le condensateur haute tension comprend une quatrième électrode formée de la première couche de métal, une cinquième électrode formée de la troisième couche de métal, et une troisième couche diélectrique entre les quatrième et cinquième électrodes, la troisième couche diélectrique étant plus épaisse que l'une ou l'autre de la première couche diélectrique ou la deuxième couche diélectrique.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)