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1. (WO2014200461) LOW POWER HIGH FREQUENCY DIGITAL PULSE FREQUENCY MODULATOR

Pub. No.:    WO/2014/200461    International Application No.:    PCT/US2013/045006
Publication Date: Fri Dec 19 00:59:59 CET 2014 International Filing Date: Tue Jun 11 01:59:59 CEST 2013
IPC: G05F 1/10
Applicants: INTEL CORPORATION
Inventors: THENUS, Fenardi
ZOU, Peng
CHEPURI, Raghu Nandan
KOERTZEN, Henry W.
Title: LOW POWER HIGH FREQUENCY DIGITAL PULSE FREQUENCY MODULATOR
Abstract:
Described is an apparatus that comprises: a programmable delay line (PDL) to receive a pulse-width modulation (PWM) signal as input and to generate a first output; a selection unit operable to provide PWM signal or its inverted version as a second output; and a sequential unit coupled to the PDL, the sequential unit to sample the second output with the first output, the sequential unit to generate a pulse-frequency modulation (PFM) output. Described is also a voltage regulator which comprises: mutually coupled on-die inductors for coupling to a load; a bridge, coupled to the mutually coupled on-die inductors, including a low-side switch and a high-side switch; a PWM controller for controlling the low-side and high-side switches during a first load current; and a PFM controller for controlling the low-side and high-side switches during a second load current, the second load current being smaller than the first load current, the PFM controller comprising: a comparator for comparing output voltage of the load with a reference voltage; and a first PDL coupled to the comparator for determining turn-on duration of the high-side switch.