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1. (WO2014190699) CPU INSTRUCTION PROCESSING METHOD AND PROCESSOR

Pub. No.:    WO/2014/190699    International Application No.:    PCT/CN2013/088251
Publication Date: Fri Dec 05 00:59:59 CET 2014 International Filing Date: Sun Dec 01 00:59:59 CET 2013
IPC: G06F 9/38
G06F 9/48
Applicants: HUAWEI TECHNOLOGIES CO., LTD.
华为技术有限公司
Inventors: ZHANG, Lixin
张立新
ZHANG, Liuhang
张柳航
HOU, Rui
侯锐
JIANG, Zhiying
姜志颖
Title: CPU INSTRUCTION PROCESSING METHOD AND PROCESSOR
Abstract:
The present invention relates to the field of computers. Provided are a CPU instruction processing method and a processor, allowing for conservation of register resources and reducing power consumption required for register reading/writing. The method is such that: when a result of a first instruction is used only once by a second instruction that follows the first instruction, an intermediate result of the first instruction and of the second instruction is not written back to a register stack, and a register that stores the intermediate result during a register-renaming stage is not renamed, that is, the register that stores the intermediate result is not mapped as a physical register. Embodiments of the present invention are for use in inter-instruction result transmission.