WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO2014189970) EFFICIENT HARDWARE IMPLEMENTATION OF SPIKING NETWORKS
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2014/189970    International Application No.:    PCT/US2014/038841
Publication Date: 27.11.2014 International Filing Date: 20.05.2014
Chapter 2 Demand Filed:    26.05.2015    
IPC:
G06N 3/04 (2006.01), G06N 3/06 (2006.01)
Applicants: QUALCOMM INCORPORATED [US/US]; ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714 (US)
Inventors: LEVIN, Jeffrey Alexander; (US).
RANGAN, Venkat; (US).
MALONE, Erik Christopher; (US)
Agent: READ, Randol W.; (US).
HAMMACK, Marcus W.; 24 Greenway Plaza, Suite 1600 Houston, TX 77046-2472 (US)
Priority Data:
61/825,657 21.05.2013 US
61/862,714 06.08.2013 US
61/862,741 06.08.2013 US
61/862,734 06.08.2013 US
61/932,364 28.01.2014 US
14/267,005 01.05.2014 US
Title (EN) EFFICIENT HARDWARE IMPLEMENTATION OF SPIKING NETWORKS
(FR) IMPLÉMENTATION MATÉRIELLE EFFICACE DE RÉSEAUX IMPULSIONNELS
Abstract: front page image
(EN)Certain aspects of the present disclosure support operating simultaneously multiple super neuron processing units in an artificial nervous system, wherein a plurality of artificial neurons is assigned to each super neuron processing unit. The super neuron processing units can be interfaced with a memory for storing and loading synaptic weights and plasticity parameters of the artificial nervous system, wherein organization of the memory allows contiguous memory access.
(FR)Selon certains aspects, la présente invention concerne la prise en charge de l'exploitation simultanée de multiples unités de traitement de super-neurones dans un système nerveux artificiel, une pluralité de neurones artificiels étant attribués à chaque unité de traitement de super-neurones. Les unités de traitement de super-neurones peuvent faire l'interface avec une mémoire pour stocker et charger des poids synaptiques et des paramètres de plasticité du système nerveux artificiel, une organisation de la mémoire permettant un accès mémoire contigu.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)