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Machine translation
1. (WO2014189510) TECHNIQUES FOR DETECTING RETURN-ORIENTED PROGRAMMING
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2014/189510    International Application No.:    PCT/US2013/042369
Publication Date: 27.11.2014 International Filing Date: 23.05.2013
IPC:
G06F 21/50 (2013.01)
Applicants: INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054 (US) (AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BE, BF, BG, BH, BJ, BN, BR, BW, BY, BZ, CA, CF, CG, CH, CI, CL, CM, CN, CO, CR, CU, CY, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, FR, GA, GB, GD, GE, GH, GM, GN, GQ, GR, GT, GW, HN, HR, HU, ID, IE, IL, IN, IS, IT, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MC, MD, ME, MG, MK, ML, MN, MR, MT, MW, MX, MY, MZ, NA, NE, NG, NI, NL, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SI, SK, SL, SM, SN, ST, SV, SY, SZ, TD, TG, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, ZA, ZM, ZW only).
YAMADA, Koichi [JP/US]; (US) (US only).
SHANMUGAVELAYUTHAM, Palanivelra [US/US]; (US) (US only).
KRISHNASWAMY, Arvind [IN/US]; (US) (US only).
AGRON, Jason M. [US/US]; (US) (US only).
LU, Jiwei [CN/US]; (US) (US only)
Inventors: YAMADA, Koichi; (US).
SHANMUGAVELAYUTHAM, Palanivelra; (US).
KRISHNASWAMY, Arvind; (US).
AGRON, Jason M.; (US).
LU, Jiwei; (US)
Agent: KACVINSKY, John; c/o CPA GLOBAL PO Box 52050 Minneapolis, MN 55402 (US)
Priority Data:
Title (EN) TECHNIQUES FOR DETECTING RETURN-ORIENTED PROGRAMMING
(FR) TECHNIQUES DE DÉTECTION D'ATTAQUE DE PROGRAMMATION ORIENTÉE RETOUR
Abstract: front page image
(EN)Various embodiments are generally directed to techniques to detect a return-oriented programming (ROP) attack by verifying target addresses of branch instructions during execution. An apparatus includes a processor component, and a comparison component for execution by the processor component to determine whether there is a matching valid target address for a target address of a branch instruction associated with a translated portion of a routine in a table comprising valid target addresses. Other embodiments are described and claimed.
(FR)Divers modes de réalisation concernent de manière générale des techniques de détection d'une attaque de programmation orientée retour (ROP), ces techniques consistant à vérifier des adresses cibles d'instruction de branchement lors d'une exécution. Un appareil comprend un composant de processeur et un composant de comparaison destiné à être exécuté par le composant de processeur afin de déterminer s'il existe une adresse cible valide concordante pour une adresse cible d'une instruction de branchement associée à une portion translatée d'une routine dans une table comprenant des adresses cibles valides. D'autres modes de réalisation sont décrits et revendiqués.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)