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1. WO2014160556 - POPULATING LOCALIZED FAST BULK STORAGE IN A MULTI-NODE COMPUTER SYSTEM

Publication Number WO/2014/160556
Publication Date 02.10.2014
International Application No. PCT/US2014/031003
International Filing Date 18.03.2014
IPC
H04L 29/08 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
29Arrangements, apparatus, circuits or systems, not covered by a single one of groups H04L1/-H04L27/136
02Communication control; Communication processing
06characterised by a protocol
08Transmission control procedure, e.g. data link level control procedure
CPC
G06F 1/263
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
263Arrangements for using multiple switchable power supplies, e.g. battery and AC
G06F 11/2002
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
16Error detection or correction of the data by redundancy in hardware
20using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
2002where interconnections or communication control functionality are redundant
G06F 11/2007
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
16Error detection or correction of the data by redundancy in hardware
20using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
2002where interconnections or communication control functionality are redundant
2007using redundant communication media
G06F 11/201
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
16Error detection or correction of the data by redundancy in hardware
20using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
2002where interconnections or communication control functionality are redundant
2007using redundant communication media
201between storage system components
G06F 11/2084
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
16Error detection or correction of the data by redundancy in hardware
20using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
2053where persistent mass storage functionality or persistent mass storage control functionality is redundant
2056by mirroring
2084on the same storage unit
G06F 11/2089
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
16Error detection or correction of the data by redundancy in hardware
20using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
2053where persistent mass storage functionality or persistent mass storage control functionality is redundant
2089Redundant storage control functionality
Applicants
  • SILICON GRAPHICS INTERNATIONAL CORP. [US]/[US]
Inventors
  • DEAN, Steven J.
  • COLLINS, David R.
  • KINYON, Paul
Agents
  • BLAU, David E.
Priority Data
13/931,86129.06.2013US
13/931,87029.06.2013US
61/806,71629.03.2013US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) POPULATING LOCALIZED FAST BULK STORAGE IN A MULTI-NODE COMPUTER SYSTEM
(FR) REMPLISSAGE DE MÉMOIRE EN MASSE LOCALISÉ RAPIDE DANS UN SYSTÈME D'ORDINATEUR À NŒUDS MULTIPLES
Abstract
(EN)
A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the processors for performing the computation are not interrupted to perform these tasks. A method for use in the HPC system receives instructions in the computing processors and first data in the memory. The method includes receiving second data into the memory while continuing to execute the instructions in the computing processors, without interruption. A computer program product implementing the method is also disclosed.
(FR)
L'invention concerne un système de calcul à hautes performances (HPC) qui comprend des lames de calcul ayant une première région qui comprend des processeurs pour réaliser un calcul, et une seconde région qui comprend une mémoire non volatile pour utilisation dans la réalisation du calcul et un autre processeur de calcul pour réaliser un mouvement et un stockage de données. Étant donné que le mouvement et le stockage de données sont déchargés vers le processeur secondaire, les processeurs pour réaliser le calcul ne sont pas interrompus pour réaliser ces tâches. Un procédé pour utilisation dans le système HPC reçoit des instructions dans les processeurs du calcul et des premières données dans la mémoire. Le procédé comprend la réception de secondes données dans la mémoire tout en continuant à exécuter les instructions dans les processeurs de calcul, sans interruption. Un produit programme d'ordinateur mettant en œuvre le procédé est également décrit.
Also published as
Latest bibliographic data on file with the International Bureau