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1. WO2014121536 - SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Publication Number WO/2014/121536
Publication Date 14.08.2014
International Application No. PCT/CN2013/072412
International Filing Date 11.03.2013
IPC
H01L 29/78 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
H01L 21/336 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
CPC
B82Y 10/00
BPERFORMING OPERATIONS; TRANSPORTING
82NANOTECHNOLOGY
YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
10Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
H01L 21/7688
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
7688by deposition over sacrificial masking layer, e.g. lift-off
H01L 23/485
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; ; Selection of materials therefor
482consisting of lead-in layers inseparably applied to the semiconductor body
485consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
H01L 29/0642
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0603characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
0642Isolation within the component, i.e. internal isolation
H01L 29/0673
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0657characterised by the shape of the body
0665the shape of the body defining a nanostructure
0669Nanowires or nanotubes
0673oriented parallel to a substrate
H01L 29/1087
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
107Substrate region of field-effect devices
1075of field-effect transistors
1079with insulated gate
1087characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
Applicants
  • 中国科学院微电子研究所 INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES [CN]/[CN]
Inventors
  • 朱慧珑 ZHU, Huilong
Agents
  • 中科专利商标代理有限责任公司 CHINA SCIENCE PATENT & TRADEMARK AGENT LTD.
Priority Data
201310050106.808.02.2013CN
Publication Language Chinese (zh)
Filing Language Chinese (ZH)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
(FR) DISPOSITIF À SEMICONDUCTEUR ET SON PROCÉDÉ DE FABRICATION
(ZH) 半导体设置及其制造方法
Abstract
(EN) Disclosed are a semiconductor device and manufacturing method thereof, an exemplary device comprising: a substrate, a back gate formed on the substrate, at least one pair of nanowires disposed on the opposing side walls of the back gate, and a back gate dielectric layer sandwiched between the back gate and the nanowires.
(FR) L'invention concerne un dispositif à semiconducteur et son procédé de fabrication. Un dispositif à semiconducteur donné en exemple comprend: un substrat; une grille arrière formée sur le substrat; au moins une paire de nanofils disposés sur les parois latérales opposées de la grille arrière; et une couche diélectrique de grille arrière prise en sandwich entre la grille arrière et les nanofils.
(ZH) 本申请公开了一种半导体设置及其制造方法。一示例设置可以包括:衬底;在衬底上形成的背栅;在背栅的相对侧壁上设置的至少一对纳米线;以及夹于背栅与各纳米线之间的背栅介质层。
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