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1. WO2014034666 - ETCHING METHOD AND SUBSTRATE PROCESSING APPARATUS

Publication Number WO/2014/034666
Publication Date 06.03.2014
International Application No. PCT/JP2013/072879
International Filing Date 27.08.2013
IPC
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
306
Chemical or electrical treatment, e.g. electrolytic etching
3065
Plasma etching; Reactive-ion etching
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
8246
Read-only memory structures (ROM)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
H01L 21/3065 (2006.01)
H01L 21/8246 (2006.01)
H01L 27/105 (2006.01)
CPC
C21D 8/12
C21D 8/1277
H01J 2237/334
H01L 43/02
H01L 43/08
H01L 43/12
Applicants
  • 東京エレクトロン株式会社 TOKYO ELECTRON LIMITED [JP/JP]; 東京都港区赤坂五丁目3番1号 3-1, Akasaka 5-Chome, Minato-Ku, Tokyo 1076325, JP
Inventors
  • 西村 栄一 NISHIMURA, Eiichi; JP
  • 清水 昭貴 SHIMIZU, Akitaka; JP
  • 山下 扶美子 YAMASHITA, Fumiko; JP
Agents
  • 伊東 忠重 ITOH, Tadashige; 東京都千代田区丸の内二丁目1番1号 丸の内 MY PLAZA (明治安田生命ビル) 16階 16th Floor, Marunouchi MY PLAZA (Meiji Yasuda Seimei Building), 1-1, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1000005, JP
Priority Data
2012-18858829.08.2012JP
61/696,47304.09.2012US
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) ETCHING METHOD AND SUBSTRATE PROCESSING APPARATUS
(FR) PROCÉDÉ DE GRAVURE ET APPAREIL DE TRAITEMENT DE SUBSTRAT
(JA) エッチング処理方法及び基板処理装置
Abstract
(EN)
Provided is an etching method for etching a multilayer film material which contains a metal laminate film wherein an insulating layer is sandwiched between a first magnetic layer and a second magnetic layer. This etching method is characterized by comprising an etching step wherein a plasma is generated by supplying a first gas into a processing chamber and the metal laminate film is etched by the generated plasma, and is also characterized in that the first gas is a gas that contains a PF3 gas.
(FR)
La présente invention concerne un procédé de gravure pour graver un matériau pelliculaire multicouche qui contient une pellicule de stratifié métallique, où une première couche magnétique et une seconde couche magnétique se trouvent de part et d'autre d'une couche isolante. Ledit procédé de gravure est caractérisé en ce qu'il comprend une étape de gravure, dans laquelle un plasma est produit en fournissant un premier gaz dans une chambre de traitement et la pellicule de stratifié métallique est gravée par le plasma produit, et est également caractérisé en ce que le premier gaz est un gaz qui contient un gaz PF3.
(JA)
 第1磁性層及び第2磁性層により絶縁層を挟んで積層された金属積層膜を含む多層膜材料をエッチングするエッチング処理方法であって、処理容器内に第1のガスを供給してプラズマを生成し、生成されたプラズマにより前記金属積層膜をエッチングするエッチング工程を含み、前記第1のガスは、PFガスを含有するガスであることを特徴とするエッチング処理方法が提供される。
Also published as
Latest bibliographic data on file with the International Bureau