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1. (WO2013161420) VERTICAL HIGH-VOLTAGE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2013/161420 International Application No.: PCT/JP2013/057123
Publication Date: 31.10.2013 International Filing Date: 14.03.2013
IPC:
H01L 29/78 (2006.01) ,H01L 21/336 (2006.01) ,H01L 29/12 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
Applicants:
富士電機株式会社 FUJI ELECTRIC CO.,LTD [JP/JP]; 神奈川県川崎市川崎区田辺新田1番1号 1-1,Tanabeshinden,Kawasaki-ku,Kawasaki-shi, Kanagawa 2109530, JP
独立行政法人産業技術総合研究所 NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY [JP/JP]; 東京都千代田区霞が関1丁目3番1号 1-3-1,Kasumigaseki,Chiyoda-ku, Tokyo 1008921, JP
Inventors:
田中 敦之 TANAKA Atsushi; JP
岩室 憲幸 IWAMURO Noriyuki; JP
原田 信介 HARADA Shinsuke; JP
Agent:
酒井 昭徳 SAKAI, Akinori; 東京都千代田区霞が関3丁目2番5号 霞が関ビルディング20階 酒井総合特許事務所 A. SAKAI & ASSOCIATES, 20F, Kasumigaseki Building, 2-5, Kasumigaseki 3-chome, Chiyoda-ku, Tokyo 1006020, JP
Priority Data:
2012-09899424.04.2012JP
Title (EN) VERTICAL HIGH-VOLTAGE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
(FR) DISPOSITIF À SEMI-CONDUCTEUR À HAUTE TENSION VERTICAL ET SON PROCÉDÉ DE FABRICATION
(JA) 縦型高耐圧半導体装置およびその製造方法
Abstract:
(EN) [Problem] To provide a vertical SiC-MOSFET, and IGBT, that has low ON-resistance without destruction of gate oxide films or degradation of reliability even when a high voltage is applied, and a method for manufacturing those. [Solution] Provided is a vertical MOSFET, wherein, in place of a well region (6), a semiconductor layer (3) and a base layer (4) are joined so as to include, as the site of juncture, a point that is equidistant from, and as far as possible from, the centers of all mutually facing source regions while being equidistant from, and as close as possible to, the tip sections furthermost from the centers of the source regions.
(FR) L'objet de la présente invention est de fournir un SiC-MOSFET vertical et un transistor bipolaire à porte isolée qui sont dotés d'une faible résistance à l'état passant sans destruction des films d'oxyde de grille ni dégradation de la fiabilité y compris lorsqu'une tension élevée est appliquée ; l'objet de la présente invention est également de fournir un procédé de fabrication de ceux-ci. La présente invention a trait à un MOSFET vertical, où, à la place d'une région de puits (6), une couche semi-conductrice (3) et une couche de base (4) sont jointes de manière à inclure, en tant que site de jonction, un point qui est équidistant des centres de toutes les régions de source se faisant mutuellement face, et aussi éloigné que possible de ceux-ci, tout en étant équidistant des sections de pointe les plus éloignées des centres des régions de source, et aussi proche que possible de celles-ci.
(JA) 【課題】高電圧印加時においても、ゲート酸化膜が破壊したり、信頼性が劣化することなく、低オン抵抗を有することができる縦型SiC-MOSFETならびにIGBTおよびそれらの製造方法を提供する。 【解決手段】縦型MOSFETにおいて、相対向するすべてのソース領域の中心から最も遠く且つ等距離の点であって、且つ、ソース領域の中心から最も離れた端部から最も近く且つ等距離の点を結合部として含むように、ウェル領域6の代わりに半導体層3及びベース層4が結合されている。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)