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1. (WO2013154371) SYSTEM AND METHOD FOR MULTI-STAGE TIME-DIVISION MULTIPLEXED LDPC DECODER

Pub. No.:    WO/2013/154371    International Application No.:    PCT/KR2013/003058
Publication Date: Fri Oct 18 01:59:59 CEST 2013 International Filing Date: Sat Apr 13 01:59:59 CEST 2013
IPC: H03M 13/11
Applicants: SAMSUNG ELECTRONICS CO., LTD.
Inventors: HENIGE, Thomas Michael
Title: SYSTEM AND METHOD FOR MULTI-STAGE TIME-DIVISION MULTIPLEXED LDPC DECODER
Abstract:
A low density parity check decoder includes a decoding process divided into two or more processing stages arranged in series. At one time, each processing stage processes a different code block than each other processing stage in the series. The decoder is capable of simultaneously decoding as many code blocks as stages. A controller passes the code blocks between the processing stages at the proper time and in the proper sequence. The controller passes the code blocks through the series of stages in a time-division multiplexed fashion.