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1. (WO2013147706) MULTI-LAYER SUBSTRATE FOR SEMICONDUCTOR PACKAGING

Pub. No.:    WO/2013/147706    International Application No.:    PCT/SG2013/000119
Publication Date: Fri Oct 04 01:59:59 CEST 2013 International Filing Date: Wed Mar 27 00:59:59 CET 2013
IPC: H01L 23/498
H01L 21/48
Applicants: ADVANPACK SOLUTIONS PTE LTD
Inventors: LIM, Shoa Siong
CHEW, Hwee Seng
Title: MULTI-LAYER SUBSTRATE FOR SEMICONDUCTOR PACKAGING
Abstract:
The present invention provides a semiconductor substrate (105, 105a) comprising two or more layers of built-up structural layers (120, 220) formed on a sacrificial carrier (110). Each built-up structural layer, comprising a conductor trace layer (114a,) and an interconnect (118a, 218a), is molded in a resin molding compound. A top surface of the molded compound is abrasively ground and then deposited with an adhesion layer (123, 124, 224). A multi-layer substrate (105, 105a) is then obtained after an outermost conductor trace layer (128a, 228a) is formed on the adhesion layer and the carrier (110) or reinforcing ring (110b) is removed.