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1. (WO2013147050) LAMINATE BODY, CONDUCTIVE PATTERN, ELECTRICAL CIRCUIT, AND METHOD FOR PRODUCING LAMINATE BODY
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2013/147050 International Application No.: PCT/JP2013/059318
Publication Date: 03.10.2013 International Filing Date: 28.03.2013
IPC:
B32B 7/02 (2006.01) ,C23C 26/00 (2006.01) ,H05K 3/18 (2006.01)
B PERFORMING OPERATIONS; TRANSPORTING
32
LAYERED PRODUCTS
B
LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
7
Layered products characterised by the relation between layers, i.e. products essentially comprising layers having different physical properties or products characterised by the interconnection of layers
02
in respect of physical properties, e.g. hardness
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
26
Coating not provided for in groups C23C2/-C23C24/87
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
10
in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
18
using precipitation techniques to apply the conductive material
Applicants:
DIC株式会社 DIC CORPORATION [JP/JP]; 東京都板橋区坂下三丁目35番58号 35-58, Sakashita 3-chome, Itabashi-ku, Tokyo 1748520, JP
Inventors:
冨士川 亘 FUJIKAWA Wataru; JP
斉藤 公恵 SAITOU Yukie; JP
村川 昭 MURAKAWA Akira; JP
白髪 潤 SHIRAKAMI Jun; JP
Agent:
河野 通洋 KONO Michihiro; 東京都千代田区神田淡路町二丁目101番地 ワテラスタワー DIC株式会社内 c/o DIC Corporation, WATERRAS TOWER, 101, Kanda Awajicho 2-chome, Chiyoda-ku, Tokyo 1010063, JP
Priority Data:
2012-08035830.03.2012JP
Title (EN) LAMINATE BODY, CONDUCTIVE PATTERN, ELECTRICAL CIRCUIT, AND METHOD FOR PRODUCING LAMINATE BODY
(FR) CORPS STRATIFIÉ, MOTIF CONDUCTEUR, CIRCUIT ÉLECTRIQUE ET MÉTHODE DE PRODUCTION DE CORPS STRATIFIÉ
(JA) 積層体、導電性パターン、電気回路及び積層体の製造方法
Abstract:
(EN) The problem addressed by the present invention is to provide a laminate body such as a conductive pattern having superior adhesion at the interfaces between a layer comprising a support body, a conductive layer containing a conductive substance, and a plating layer. The present invention pertains to: a laminate body having at least a support body layer (I), a conductive layer (II), and a plating layer (III), and characterized by the conductive layer (II) having an oxidized surface, and the plating layer (III) being laminated to the oxidized surface of the conductive layer (II); a conductive pattern; and an electrical circuit.
(FR) Le problème résolu par la présente invention est de fournir un corps stratifié tel qu'un motif conducteur avec une adhésion supérieure aux interfaces entre une couche comprenant un corps support, une couche conductrice contenant une substance conductrice et une couche de placage. La présente invention concerne : un corps stratifié avec au moins une couche corps support (I), une couche conductrice (II), et une couche de placage (III), la couche conductrice (II) ayant une surface oxydée, et la couche de placage (III) étant stratifiée sur la surface oxydée de la couche conductrice (II) ; un motif conducteur ; et un circuit électrique.
(JA) 本発明が解決しようとする課題は、支持体からなる層と、導電性物質を含む導電層と、めっき層との各界面における密着性に優れた導電性パターン等の積層体を提供することである。本発明は、少なくとも、支持体層(I)と、導電層(II)と、めっき層(III)とを有する積層体であって、前記導電層(II)が酸化された表面を有し、かつ、前記めっき層(III)が、前記導電層(II)の酸化された表面に積層されたものであることを特徴とする積層体、導電性パターン及び電気回路に関するものである。
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)