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1. WO2013146327 - MANUFACTURING METHOD FOR SILICON CARBIDE SEMICONDUCTOR ELEMENT

Publication Number WO/2013/146327
Publication Date 03.10.2013
International Application No. PCT/JP2013/057313
International Filing Date 14.03.2013
IPC
H01L 21/28 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
CPC
H01L 21/0475
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
0445the devices having semiconductor bodies comprising crystalline silicon carbide
0475Changing the shape of the semiconductor body, e.g. forming recesses,
H01L 21/0485
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
0445the devices having semiconductor bodies comprising crystalline silicon carbide
048Making electrodes
0485Ohmic electrodes
H01L 21/3065
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
302to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
306Chemical or electrical treatment, e.g. electrolytic etching
3065Plasma etching; Reactive-ion etching
H01L 21/3081
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
302to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
306Chemical or electrical treatment, e.g. electrolytic etching
308using masks
3081characterised by their composition, e.g. multilayer masks, materials
H01L 29/1606
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
12characterised by the materials of which they are formed
16including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
1606Graphene
H01L 29/1608
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
12characterised by the materials of which they are formed
16including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
1608Silicon carbide
Applicants
  • 富士電機株式会社 FUJI ELECTRIC CO., LTD. [JP]/[JP]
  • 独立行政法人産業技術総合研究所 NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY [JP]/[JP]
Inventors
  • 後藤 雅秀 GOTO, Masahide
  • 福田 憲司 FUKUDA, Kenji
  • 岩室 憲幸 IWAMURO, Noriyuki
Agents
  • 酒井 昭徳 SAKAI, Akinori
Priority Data
2012-07302928.03.2012JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) MANUFACTURING METHOD FOR SILICON CARBIDE SEMICONDUCTOR ELEMENT
(FR) PROCÉDÉ DE FABRICATION D'UN ÉLÉMENT SEMI-CONDUCTEUR EN CARBURE DE SILICIUM
(JA) 炭化珪素半導体素子の製造方法
Abstract
(EN)
First, on the back side of a silicon carbide substrate (1) is formed a first metal layer (3) of a thickness that does not completely cover the back side of the silicon carbide substrate. Next, numerous holes (4) are made in the back side of the silicon carbide substrate (1) by using the first metal layer (3) as a mask to dry etch the back side of the silicon carbide substrate (1). Next, a second metal layer constituting an ohmic electrode is formed on the back side of the silicon carbide substrate (1), and so as to include the top of the first metal layer (3) and the interior of the numerous holes (4). This method makes it possible to form, at a low temperature, an ohmic electrode on the back side of the silicon carbide substrate, and makes it possible to lower the contact resistance between the ohmic electrode and silicon carbide semiconductor.
(FR)
Selon la présente, il est d'abord formé sur la face arrière d'un substrat en carbure de silicium (1) une première couche métallique (3) qui présente une épaisseur qui ne recouvre pas complètement la face arrière du substrat en carbure de silicium. Ensuite, de nombreux trous (4) sont réalisés dans la face arrière du substrat en carbure de silicium (1) en utilisant la première couche métallique (3) comme masque afin de graver à sec la face arrière du substrat en carbure de silicium (1). Ensuite, une seconde couche métallique qui constitue une électrode ohmique, est formée sur la face arrière du substrat en carbure de silicium (1) et de sorte à comprendre la partie supérieure de la première couche métallique (3) et l'intérieur des nombreux trous (4). Ce procédé permet de former, à une basse température, une électrode ohmique sur la base arrière du substrat en carbure de silicium et permet de réduire la résistance de contact entre l'électrode ohmique et le semi-conducteur en carbure de silicium.
(JA)
 まず、炭化珪素基板(1)の裏面に、炭化珪素基板の裏面を完全に被覆してしまわない程度の厚みの第1の金属層(3)を形成する。次に、第1の金属層(3)をマスクとして炭化珪素基板(1)の裏面をドライエッチングすることにより、炭化珪素基板(1)の裏面に多数の孔(4)を穿つ。次に、第1の金属層(3)上及び多数の孔(4)の内部を含む炭化珪素基板(1)の裏面上にオーミック電極を構成する第2の金属層を形成する。これにより、炭化珪素基板裏面のオーミック電極を低温で形成することができ、かつオーミック電極と炭化珪素半導体とのコンタクト抵抗を低抵抗化させることができる。
Also published as
Latest bibliographic data on file with the International Bureau