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1. (WO2013145555) INTEGRATED DEVICE
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2013/145555 International Application No.: PCT/JP2013/001218
Publication Date: 03.10.2013 International Filing Date: 28.02.2013
Chapter 2 Demand Filed: 26.12.2013
IPC:
H01L 25/04 (2006.01) ,G01L 9/00 (2006.01) ,H01L 21/76 (2006.01) ,H01L 21/822 (2006.01) ,H01L 25/18 (2006.01) ,H01L 27/04 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
G PHYSICS
01
MEASURING; TESTING
L
MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
9
Measuring steady or quasi-steady pressure of a fluid or a fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
76
Making of isolation regions between components
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18
the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
Applicants:
巻幡 光俊 MAKIHATA, Mitsutoshi [JP/JP]; JP (US)
江刺 正喜 ESASHI, Masayoshi [JP/JP]; JP (US)
田中 秀治 TANAKA, Shuji [JP/JP]; JP (US)
室山 真徳 MUROYAMA, Masanori [JP/JP]; JP (US)
船橋 博文 FUNABASHI, Hirofumi [JP/JP]; JP (US)
野々村 裕 NONOMURA, Yutaka [JP/JP]; JP (US)
畑 良幸 HATA, Yoshiyuki [JP/JP]; JP (US)
山田 整 YAMADA, Hitoshi [JP/JP]; JP (US)
中山 貴裕 NAKAYAMA, Takahiro [JP/JP]; JP (US)
山口 宇唯 YAMAGUCHI, Ui [JP/JP]; JP (US)
国立大学法人東北大学 TOHOKU UNIVERSITY [JP/JP]; 宮城県仙台市青葉区片平二丁目1番1号 2-1-1 Katahira, Aoba-ku, Sendai-shi, Miyagi 9808577, JP (AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BE, BF, BG, BH, BJ, BN, BR, BW, BY, BZ, CA, CF, CG, CH, CI, CL, CM, CN, CO, CR, CU, CY, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, FR, GA, GB, GD, GE, GH, GM, GN, GQ, GR, GT, GW, HN, HR, HU, ID, IE, IL, IN, IS, IT, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MC, MD, ME, MG, MK, ML, MN, MR, MT, MW, MX, MY, MZ, NA, NE, NG, NI, NL, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SI, SK, SL, SM, SN, ST, SV, SY, SZ, TD, TG, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, ZA, ZM, ZW)
株式会社豊田中央研究所 KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO [JP/JP]; 愛知県長久手市横道41番地の1 41-1, Yokomichi, Nagakute-shi, Aichi 4801192, JP (AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BE, BF, BG, BH, BJ, BN, BR, BW, BY, BZ, CA, CF, CG, CH, CI, CL, CM, CN, CO, CR, CU, CY, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, FR, GA, GB, GD, GE, GH, GM, GN, GQ, GR, GT, GW, HN, HR, HU, ID, IE, IL, IN, IS, IT, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MC, MD, ME, MG, MK, ML, MN, MR, MT, MW, MX, MY, MZ, NA, NE, NG, NI, NL, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SI, SK, SL, SM, SN, ST, SV, SY, SZ, TD, TG, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, ZA, ZM, ZW)
トヨタ自動車株式会社 TOYOTA JIDOSHA KABUSHIKI KAISHA [JP/JP]; 愛知県豊田市トヨタ町1番地 1, Toyota-cho, Toyota-shi, Aichi 4718571, JP (AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BE, BF, BG, BH, BJ, BN, BR, BW, BY, BZ, CA, CF, CG, CH, CI, CL, CM, CN, CO, CR, CU, CY, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, FR, GA, GB, GD, GE, GH, GM, GN, GQ, GR, GT, GW, HN, HR, HU, ID, IE, IL, IN, IS, IT, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MC, MD, ME, MG, MK, ML, MN, MR, MT, MW, MX, MY, MZ, NA, NE, NG, NI, NL, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SI, SK, SL, SM, SN, ST, SV, SY, SZ, TD, TG, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, ZA, ZM, ZW)
Inventors:
巻幡 光俊 MAKIHATA, Mitsutoshi; JP
江刺 正喜 ESASHI, Masayoshi; JP
田中 秀治 TANAKA, Shuji; JP
室山 真徳 MUROYAMA, Masanori; JP
船橋 博文 FUNABASHI, Hirofumi; JP
野々村 裕 NONOMURA, Yutaka; JP
畑 良幸 HATA, Yoshiyuki; JP
山田 整 YAMADA, Hitoshi; JP
中山 貴裕 NAKAYAMA, Takahiro; JP
山口 宇唯 YAMAGUCHI, Ui; JP
Agent:
家入 健 IEIRI, Takeshi; 神奈川県横浜市神奈川区鶴屋町三丁目33番8アサヒビルヂング10階響国際特許事務所 HIBIKI IP Law Firm, Asahi Bldg. 10th Floor, 3-33-8, Tsuruya-cho, Kanagawa-ku, Yokohama-shi, Kanagawa 2210835, JP
Priority Data:
2012-07981130.03.2012JP
Title (EN) INTEGRATED DEVICE
(FR) DISPOSITIF INTÉGRÉ
(JA) 集積化デバイス
Abstract:
(EN) Provided is an integrated device with superior insulation resistance. A channel (150) constituted with an inclined surface on a side surface (152) is provided between adjacent devices. When the front surface is a side on which an electronic circuit or a MEMS device is provided, the channel (150) narrows from the front surface toward the back surface because of the inclined surface. By interposing a molded material (insulating material) (160) in the channel (150), a plurality of devices can be mechanically joined in a state of electrical insulation from each other. In the forming of wiring material (171) that electrically connects adjacent devices to each other, forming is carried out along the side surfaces and bottom surface of the channel (150). When extracting wiring from the back surface, a hole is formed in the bottom surface (151) of the channel (150), and the wiring material (171) is exposed on the back surface by the hole.
(FR) La présente invention se rapporte à un dispositif intégré qui présente une meilleure résistance d'isolement. Un canal (150) constitué avec une surface inclinée sur une surface latérale (152), est agencé entre des dispositifs adjacents. Lorsque la surface avant constitue un côté sur lequel est agencé un circuit électronique ou un dispositif de système microélectromécanique (MEMS pour Micro-ElectroMechanical System), le canal (150) se rétrécit en allant de la surface avant vers la surface arrière en raison de la surface inclinée. En intercalant un matériau moulé (un matériau isolant) (160) dans le canal (150), une pluralité de dispositifs peuvent être unis mécaniquement dans un état permettant un isolement électrique des dispositifs les uns par rapport aux autres. Lors du façonnage d'un matériau de câblage (171) qui raccorde électriquement les dispositifs adjacents les uns aux autres, le façonnage est effectué le long des surfaces latérales et de la surface inférieure du canal (150). Lors de l'extraction du câblage de la surface arrière, un trou est formé dans la surface inférieure (151) du canal (150) et le matériau de câblage (171) est exposé sur la surface arrière par le trou.
(JA)  絶縁耐性に優れた集積化デバイスを提供する。隣接するデバイス同士の間には、側面(152)が傾斜面で構成された溝(150)が設けられている。電子回路またはMEMSデバイスが設けられる側を表面としたときに、溝(150)は傾斜面により表面から裏面に向けて幅狭になっている。溝(150)にモールド材(絶縁材料)(160)が介在することにより、複数のデバイスが互いに電気的に絶縁された状態で機械的に接合されている。隣接するデバイス同士の電気的導通をとる配線材(171)を形成するにあたっては、溝(150)の側面および底面に沿うように形成する。裏面に配線を取り出すにあたっては、溝(150)の底面(151)に孔を形成して、配線材(171)が孔から裏面に露出するようにする。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)