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1. WO2013132815 - MODULE WITH EMBEDDED ELECTRONIC COMPONENTS, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING MODULE WITH EMBEDDED ELECTRONIC COMPONENTS

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Publication Number WO/2013/132815
Publication Date 12.09.2013
International Application No. PCT/JP2013/001293
International Filing Date 04.03.2013
IPC
H05K 3/28 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
22Secondary treatment of printed circuits
28Applying non-metallic protective coatings
H01L 25/04 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
H01L 25/18 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
H05K 1/02 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
CPC
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H05K 1/147
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
14Structural association of two or more printed circuits
147at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
H05K 1/181
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
18Printed circuits structurally associated with non-printed electric components
181associated with surface mounted components
H05K 2201/09972
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
2201Indexing scheme relating to printed circuits covered by H05K1/00
09Shape and layout
09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
09972Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
H05K 3/284
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
22Secondary treatment of printed circuits
28Applying non-metallic protective coatings
284for encapsulating mounted components
Applicants
  • 日本電気株式会社 NEC CORPORATION [JP]/[JP] (AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BE, BF, BG, BH, BJ, BN, BR, BW, BY, BZ, CA, CF, CG, CH, CI, CL, CM, CN, CO, CR, CU, CY, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, FR, GA, GB, GD, GE, GH, GM, GN, GQ, GR, GT, GW, HN, HR, HU, ID, IE, IL, IN, IS, IT, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MC, MD, ME, MG, MK, ML, MN, MR, MT, MW, MX, MY, MZ, NA, NE, NG, NI, NL, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SI, SK, SL, SM, SN, ST, SV, SY, SZ, TD, TG, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, ZA, ZM, ZW)
  • 西村　望 NISHIMURA, Nozomu [JP]/[JP] (US)
  • 三上　伸弘 MIKAMI, Nobuhiro [JP]/[JP] (US)
Inventors
  • 西村　望 NISHIMURA, Nozomu
  • 三上　伸弘 MIKAMI, Nobuhiro
Agents
  • 下坂　直樹 SHIMOSAKA, Naoki
Priority Data
2012-05254209.03.2012JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) MODULE WITH EMBEDDED ELECTRONIC COMPONENTS, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING MODULE WITH EMBEDDED ELECTRONIC COMPONENTS
(FR) MODULE ÉQUIPÉ DE COMPOSANTS ÉLECTRONIQUES INTÉGRÉS, DISPOSITIF ÉLECTRONIQUE ET PROCÉDÉ DE FABRICATION DE MODULE ÉQUIPÉ DE COMPOSANTS ÉLECTRONIQUES INTÉGRÉS
(JA) 電子部品内蔵モジュールおよび電子機器並びに電子部品内蔵モジュールの製造方法
front page image
Abstract
(EN)
[Problem] To provide a module with embedded electronic components, wherein a wiring substrate on which electronic components are mounted is resin-sealed, and with which mounting is possible in a small space. [Solution] A module with embedded electronic components, comprising: a wiring substrate (110), comprising a substrate and wiring formed on a portion of the substrate; electronic components (120) mounted on the wiring substrate (110); and resin (130) that resin-seals the electronic components (120) together with a portion of the wiring substrate. On one surface of the wiring substrate (110) there is at least a resin-sealed region (201), which is sealed with the resin (130), and a non-resin-sealed region (202), which is not sealed with the resin (130), and when viewed from the other surface of the wiring substrate, at least a portion of the boundary (203) between the resin-sealed region (201) and the non-resin-sealed region (202) is inside of the outer edge of the resin that seals the resin-sealed region (201).
(FR)
Le problème décrit par la présente invention est de fournir un module équipé de composants électroniques intégrés, un substrat de câblage sur lequel sont montés des composants électroniques étant scellé à la résine, et permettant un montage dans un petit espace. La solution selon l'invention porte sur un module comportant des composants électroniques intégrés, et comprenant : un substrat de câblage (110), comportant un substrat et un câblage formé sur une partie du substrat; des composants électroniques (120) montés sur le substrat de câblage (110); et une résine (130) qui scelle à la résine les composants électroniques (120) conjointement avec une partie du substrat de câblage. Sur une surface du substrat de câblage (110), il existe au moins une région scellée à la résine (201), qui est scellée à l'aide de la résine (130), et une région non scellée à la résine (202), qui n'est pas scellée à l'aide de la résine (130), et vue depuis l'autre surface du substrat de câblage, au moins une partie de la frontière (203) entre la région scellée à la résine (201) et la région non scellée à la résine (202) se trouve à l'intérieur du bord externe de la résine qui scelle la région scellée à la résine (201).
(JA)
［課題］電子部品が実装された配線基板を樹脂封止した部品内蔵モジュールにおいて、省スペースで実装可能な部品内蔵モジュールを提供することを目的とする。 ［解決手段］基材と基材上の一部に形成された配線からなる配線基板１１０と、配線基板１１０に実装された電子部品１２０と、前記電子部品１２０を前記配線基板の一部と共に樹脂封止する樹脂１３０からなる。前記配線基板１１０は、一方の面において、樹脂１３０で封止された樹脂封止領域２０１と、樹脂１３０で封止されていない樹脂非封止領域２０２を少なくとも有し、樹脂封止領域２０１と樹脂非封止領域２０２の境界２０３の少なくとも一部は、前記配線基板の他方の面の側から見て、前記樹脂封止領域２０１を封止している樹脂の外縁の内側にある。
Also published as
JPWO2013132815
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