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1. (WO2013122551) METHOD AND DEVICE FOR TESTING AND ADJUSTING THE TEMPERATURE COEFFICIENT OF INTEGRATED CIRCUITS
Latest bibliographic data on file with the International Bureau   

Pub. No.: WO/2013/122551 International Application No.: PCT/SI2013/000001
Publication Date: 22.08.2013 International Filing Date: 16.01.2013
IPC:
H01L 21/66 (2006.01) ,G01R 31/28 (2006.01) ,H01L 23/34 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
66
Testing or measuring during manufacture or treatment
G PHYSICS
01
MEASURING; TESTING
R
MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28
Testing of electronic circuits, e.g. by signal tracer
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
34
Arrangements for cooling, heating, ventilating or temperature compensation
Applicants: UNIVERZA V LJUBLJANI[SI/SI]; Fakulteta za elektrotehniko Tržaška cesta 25 1000 Ljubljana, SI
Inventors: TRONTELJ, Janez ml.; SI
TRONTELJ, Janez; SI
ŠMID, Blaž; SI
Agent: ITEM, D.O.O.; Resljeva cesta 16 1000 Ljubljana, SI
Priority Data:
P-20120005017.02.2012SI
Title (EN) METHOD AND DEVICE FOR TESTING AND ADJUSTING THE TEMPERATURE COEFFICIENT OF INTEGRATED CIRCUITS
(FR) PROCÉDÉ ET DISPOSITIF D'ESSAI ET D'AJUSTEMENT DU COEFFICIENT DE TEMPÉRATURE DE CIRCUITS INTÉGRÉS
Abstract:
(EN) The invention herein proposed relates to a method and embodiments of a device enabling testing and/or calibration of the temperature coefficient of an integrated circuit (101) as such. The method according to the present invention relates to the use of measurement data at two temperatures. Based on the measurement data and the signal characteristics of the integrated circuit, which functionally depend upon time, temperature, and load conditions, the temperature coefficient of the integrated circuit may be sorted/ calibrated. The device according to the present invention relates to an integrated circuit combined with an external load circuit, or an integrated circuit with an inbuilt load circuit, wherein said load circuit increases the current in the integrated circuit, whereby the temperature of the integrated circuit is increased as well.
(FR) L'invention porte sur un procédé et des modes de réalisation d'un dispositif permettant l'essai et/ou l'étalonnage du coefficient de température d'un circuit intégré. Le procédé selon la présente invention concerne l'utilisation de données de mesure à deux températures. Sur la base des données de mesure et des caractéristiques de signal du circuit intégré, qui dépendent fonctionnellement du temps, de la température et des conditions de charge, le coefficient de température du circuit intégré peut être trié/étalonné. Le dispositif selon la présente invention porte sur un circuit intégré combiné avec un circuit de charge externe, ou un circuit intégré à circuit de charge incorporé, ledit circuit de charge augmentant le courant dans le circuit intégré, ce par quoi la température du circuit intégré est également augmentée.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: ???LANGUAGE_SYMBOL_SL??? (SL)