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1. WO2013103113 - ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING SAME

Publication Number WO/2013/103113
Publication Date 11.07.2013
International Application No. PCT/JP2012/083610
International Filing Date 26.12.2012
IPC
H05K 3/46 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
46Manufacturing multi-layer circuits
H01L 23/12 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
H01L 23/14 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
14characterised by the material or its electrical properties
H01L 23/15 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
14characterised by the material or its electrical properties
15Ceramic or glass substrates
CPC
H01L 21/486
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
4814Conductive parts
4846Leads on or in insulating or insulated substrates, e.g. metallisation
486Via connections through the substrate with or without pins
H01L 2224/131
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
13of an individual bump connector
13001Core members of the bump connector
13099Material
131with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
H01L 2224/1329
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
13of an individual bump connector
13001Core members of the bump connector
13099Material
13198with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
13199Material of the matrix
1329with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
H01L 2224/133
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
13of an individual bump connector
13001Core members of the bump connector
13099Material
13198with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
13298Fillers
13299Base material
133with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/16227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
16227the bump connector connecting to a bond pad of the item
Applicants
  • 株式会社村田製作所 MURATA MANUFACTURING CO., LTD. [JP]/[JP]
Inventors
  • 長野 高之 NAGANO, Takayuki
  • 野宮 正人 NOMIYA, Masato
Agents
  • 岡田 全啓 OKADA, Masahiro
Priority Data
2012-00116706.01.2012JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING SAME
(FR) COMPOSANT ÉLECTRONIQUE ET SON PROCÉDÉ DE FABRICATION
(JA) 電子部品およびその製造方法
Abstract
(EN) Provided is an electronic component capable of establishing a highly reliable connection with a via hole conductor penetrating a resin layer formed so as to cover a wiring board and a conductor pattern formed on the wiring board. The electronic component (10) includes the wiring board (12). A recess (18), included in a stress relief structure, is formed on a conductor pattern (16a) for the via hole conductor, on one principal surface side of the wiring board (12). An electronic component element (20) is surface-mounted on the one principal surface side of the wiring board (12). The electronic component element (20) and the one principal surface of the wiring board (12) are covered by a resin layer (24). A via hole conductor (28) is formed in the resin layer (24) so as to penetrate the resin layer (24). The via hole conductor (28) is connected to the conductor pattern (16a). A connecting portion (30) between the via hole conductor (28) and the conductor pattern (16a) for the via hole conductor are formed in the recess (18) on the wiring board (12).
(FR) La présente invention se rapporte à un composant électronique capable d'établir une connexion hautement fiable avec un conducteur de trou d'interconnexion pénétrant dans une couche de résine formée de manière à recouvrir un tableau de connexions et un motif de conducteur formé sur le tableau de connexions. Le composant électronique (10) comprend le tableau de connexions (12). Un évidement (18), inclus dans une structure de détente des contraintes, est formé sur un motif conducteur (16a) pour le conducteur de trou d'interconnexion, sur un côté de la surface principale du tableau de connexions (12). Un élément de composant électronique (20) est monté en surface sur le côté de surface principale du tableau de connexions (12). L'élément de composant électronique (20) et la surface principale du tableau de connexions (12) sont recouverts par une couche de résine (24). Le conducteur de trou d'interconnexion (28) est formé dans la couche de résine (24) de manière à pénétrer dans la couche de résine (24). Le conducteur de trou d'interconnexion (28) est connecté au motif conducteur (16a). Une partie de connexion (30) entre le conducteur de trou d'interconnexion (28) et le motif conducteur (16a) pour le conducteur de trou d'interconnexion sont formés dans l'évidement (18) sur le tableau de connexions (12).
(JA)  配線基板に形成された導体パターンと配線基板を覆うようにして形成された樹脂層を貫通するビアホール導体との接続信頼性がよい、電子部品を提供する。 電子部品10は、配線基板12を含む。配線基板12の一方主面側には、ビアホール導体用導体パターン16aの上に、応力緩和構造に含まれる凹部18が形成される。配線基板12の一方主面側には、電子部品素子20が表面実装される。配線基板12の一方主面および電子部品素子20は、樹脂層24で覆われる。樹脂層24には、それを貫通するようにしてビアホール導体28が形成される。ビアホール導体28は、導体パターン16aに接続される。ビアホール導体用導体パターン16aおよびビアホール導体28の接続部分30は、配線基板12の凹部18内に形成される。
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