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1. WO2013101554 - METABLOCK SIZE REDUCTION USING ON CHIP PAGE SWAPPING BETWEEN PLANES

Publication Number WO/2013/101554
Publication Date 04.07.2013
International Application No. PCT/US2012/070360
International Filing Date 18.12.2012
IPC
G11C 7/10 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
10Input/output data interface arrangements, e.g. I/O data control circuits, I/O data buffers
G11C 11/56 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
56using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
G11C 16/10 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
10Programming or data input circuits
CPC
G11C 11/5621
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
56using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
5621using charge storage in a floating gate
G11C 16/10
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
10Programming or data input circuits
G11C 7/1012
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
1012Data reordering during input/output, e.g. crossbars, layers of multiplexers, shifting or rotating
Applicants
  • SANDISK TECHNOLOGIES INC. [US]/[US]
Inventors
  • SPROUSE, Steven
  • GOROBETS, Sergey, Anatolievich
Agents
  • PENN, Amir, N.
Priority Data
13/341,54330.12.2011US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) METABLOCK SIZE REDUCTION USING ON CHIP PAGE SWAPPING BETWEEN PLANES
(FR) RÉDUCTION DE LA TAILLE DE MÉTABLOCS AU MOYEN DE LA PERMUTATION DE PAGES SUR PUCE ENTRE DES PLANS
Abstract
(EN) Methods and systems are disclosed herein for storing data in a memory device. Data for multiple pages is written in parallel using plane interleaving. For example, in a four plane write, a first set of four pages are written in the following sequence: 0, 1, 2, 3. A second set of four pages, after plane interleaving, are written in the following sequent: 7, 4, 5, 6. After writing the data, the pages of written data are read, page swapped if necessary, and then written into another portion of memory (such as MLC).
(FR) L'invention concerne des procédés et des systèmes permettant de stocker des données dans un dispositif à mémoire. Des données pour plusieurs pages sont écrites en parallèle à l'aide d'un entrelacement de plans. Par exemple, dans une écriture sur quatre plans, une première série de quatre pages est écrite dans l'ordre suivant : 0, 1, 2, 3. Une seconde série de quatre pages, après l'entrelacement de plans, est écrite dans l'ordre suivant : 7, 4, 5, 6. Après l'écriture des données, les pages de données écrites sont lues, permutées si cela est nécessaire, puis écrites dans une autre partie de la mémoire (telle que la MLC).
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