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1. WO2013056936 - METHOD FOR PRODUCING THIN SEMICONDUCTOR COMPONENTS

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Publication Number WO/2013/056936
Publication Date 25.04.2013
International Application No. PCT/EP2012/068344
International Filing Date 18.09.2012
IPC
H01L 21/683 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
683for supporting or gripping
H01L 27/146 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
144Devices controlled by radiation
146Imager structures
H01L 21/768 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71Manufacture of specific parts of devices defined in group H01L21/7086
768Applying interconnections to be used for carrying current between separate components within a device
H01L 23/48 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
CPC
H01L 21/6835
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683for supporting or gripping
6835using temporarily an auxiliary support
H01L 21/6836
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683for supporting or gripping
6835using temporarily an auxiliary support
6836Wafer tapes, e.g. grinding or dicing support tapes
H01L 21/76879
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
76879by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
H01L 21/76898
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76898formed through a semiconductor substrate
H01L 2221/68327
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
68327used during dicing or grinding
H01L 2221/6834
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
6834used to protect an active side of a device or wafer
Applicants
  • AMS AG [AT]/[AT] (AllExceptUS)
  • STERING, Bernhard [AT]/[AT] (US)
  • SIEGERT, Jörg [AT]/[AT] (US)
  • LÖFFLER, Bernhard [AT]/[AT] (US)
Inventors
  • STERING, Bernhard
  • SIEGERT, Jörg
  • LÖFFLER, Bernhard
Agents
  • EPPING HERMANN FISCHER PATENTANWALTSGESELLSCHAFT MBH
Priority Data
102011116409.319.10.2011DE
Publication Language German (de)
Filing Language German (DE)
Designated States
Title
(DE) VERFAHREN ZUR HERSTELLUNG DÜNNER HALBLEITERBAUELEMENTE
(EN) METHOD FOR PRODUCING THIN SEMICONDUCTOR COMPONENTS
(FR) PROCÉDÉ POUR FABRIQUER DES COMPOSANTS SEMI-CONDUCTEURS DE FAIBLE ÉPAISSEUR
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Abstract
(DE) Ein Halbleitersubstrat (1) wird an einer Oberseite (2) mit einer Struktur (3) versehen, und ein zur Handhabung des Halbleitersubstrates vorgesehenes weiteres Substrat (4) wird an einer Oberseite (5) ebenfalls strukturiert. Die Strukturierung des weiteren Substrates erfolgt in zumindest teilweiser Entsprechung zu der Struktur des Halbleitersubstrates. Die strukturierten Oberseiten des Halbleitersubstrates und des weiteren Substrates werden einander zugewandt und dauerhaft miteinander verbunden. Dann wird das Halbleitersubstrat von der Rückseite (6) her gedünnt, und das weitere Substrat wird zumindest soweit entfernt, dass die Struktur des Halbleitersubstrates in dem für die weitere Verwendung vorgesehenen Umfang freigelegt ist.
(EN) The invention relates to a semiconductor substrate (1) having a structure (3) on an upper face (2) and another substrate (4) for handling the semiconductor substrate which is likewise structured on an upper face (5). The structuring of the other substrate occurs in at least partial correspondence to the structure of the semiconductor substrate. The structured upper faces of the semiconductor substrate and the other substrate face each other and are permanently connected to each other. The semiconductor substrate is then thinned from the rear face (6) and the other substrate is removed at least far enough so that the structure of the semiconductor substrate is exposed to a sufficient extent for further use.
(FR) Procédé selon lequel un substrat semi-conducteur (1) est pourvu d'une structure (3) sur une face supérieure (2), et un autre substrat (4) servant à manipuler le substrat semi-conducteur est également structuré sur une face supérieure (5). La structuration de l'autre substrat est réalisée au moins partiellement conformément à la structure du substrat semi-conducteur. Les faces supérieures structurées du substrat semi-conducteur et de l'autre substrat sont placées en vis-à-vis l'une de l'autre et assemblées de manière permanente. Le substrat semi-conducteur est ensuite aminci en partant de la face arrière (6) et l'autre substrat est retiré au moins de sorte que la structure du substrat semi-conducteur soit mise à nue dans la zone prévue pour l'utilisation ultérieure.
Related patent documents
DE102011116409
US20140349462
Latest bibliographic data on file with the International Bureau
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