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Machine translation
1. (WO2013051763) DIFFERENTIAL POWER AMPLIFIER USING MODE INJECTION
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2013/051763    International Application No.:    PCT/KR2011/010046
Publication Date: 11.04.2013 International Filing Date: 23.12.2011
IPC:
H03F 3/45 (2006.01), H03F 3/21 (2006.01)
Applicants: SOONGSIL UNIVERSITY RESEARCH CONSORTIUM TECHNO-PARK [KR/KR]; 511, Sangdo-dong, Dongjak-gu Seoul 156-030 (KR) (For All Designated States Except US).
LEE, Chang-Hyun [KR/KR]; (KR) (For US Only).
PARK, Chang-Kun [KR/KR]; (KR) (For US Only)
Inventors: LEE, Chang-Hyun; (KR).
PARK, Chang-Kun; (KR)
Agent: TAEBAEK INTELLECTUAL PROPERTY LAW FIRM; #906, Kolon technovalley, 60-4 Gasan-dong, Geumcheon-gu Seoul 153-770 (KR)
Priority Data:
10-2011-0102572 07.10.2011 KR
Title (EN) DIFFERENTIAL POWER AMPLIFIER USING MODE INJECTION
(FR) AMPLIFICATEUR DE PUISSANCE DIFFÉRENTIEL UTILISANT UNE INJECTION DE MODE
(KO) 모드 주입을 이용한 차동 전력 증폭기
Abstract: front page image
(EN)The present invention provides a differential power amplifier, which uses mode injection characterized by: a first transistor, the gate of which receives a first signal and the source of which is connected to ground; a second transistor, the gate of which receives a second signal having an opposite phase to the first signal and the source of which is connected to ground; a third transistor, the source of which is connected to the source of the first transistor; a fourth transistor, the source of which is connected to the source of the second transistor; a fifth transistor, the source of which is connected to the drain of the first transistor and the drain of which is connected to a first output port and the drain of the third transistor; and a sixth transistor, the source of which is connected to the drain of the second transistor and the drain of which is connected to a second output port and the drain of the fourth transistor, wherein the gate of the third transistor is connected to the drain of the second transistor and the gate of the fourth transistor is connected to the drain of the first transistor.
(FR)La présente invention se rapporte à un amplificateur de puissance différentiel qui utilise une injection de mode et qui est caractérisé en ce qu'il comprend : un premier transistor dont la grille reçoit un premier signal et dont la source est connectée à la terre ; un deuxième transistor dont la grille reçoit un second signal qui a une phase opposée à celle du premier signal et dont la source est connectée à la terre ; un troisième transistor dont la source est connectée à la source du premier transistor ; un quatrième transistor dont la source est connectée à la source du deuxième transistor ; un cinquième transistor dont la source est connectée au drain du premier transistor et dont le drain est connecté à un premier pôle de sortie ainsi qu'au drain du troisième transistor ; et un sixième transistor dont la source est connectée au drain du deuxième transistor et dont le drain est connecté à un second pôle de sortie ainsi qu'au drain du quatrième transistor. La grille du troisième transistor est connectée au drain du deuxième transistor, et la grille du quatrième transistor est connectée au drain du premier transistor.
(KO)본 발명은, 게이트에 제1 신호가 입력되고, 소스가 그라운드와 연결된 제1 트랜지스터와, 게이트에 상기 제1 신호와 반대 위상을 갖는 제2 신호가 입력되고, 소스가 상기 그라운드와 연결된 제2 트랜지스터와, 소스가 상기 제1 트랜지스터의 소스와 연결된 제3 트랜지스터와, 소스가 상기 제2 트랜지스터의 소스와 연결된 제4 트랜지스터와, 소스가 상기 제1 트랜지스터의 드레인과 연결되고, 드레인이 제1 출력 포트 및 상기 제3 트랜지스터의 드레인과 각각 연결된 제5 트랜지스터, 및 소스가 상기 제2 트랜지스터의 드레인과 연결되고, 드레인이 제2 출력 포트 및 상기 제4 트랜지스터의 드레인과 각각 연결된 제6 트랜지스터를 포함하고, 상기 제3 트랜지스터의 게이트는 상기 제2 트랜지스터의 드레인과 연결 되고, 상기 제4 트랜지스터의 게이트는 상기 제1 트랜지스터의 드레인과 연결된 모드 주입을 이용한 차동 전력 증폭기를 제공한다.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: Korean (KO)
Filing Language: Korean (KO)