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Machine translation
1. (WO2013048179) SUBSTRATE HAVING CONCAVE-CONVEX PATTERN, LIGHT-EMITTING DIODE INCLUDING THE SUBSTRATE, AND METHOD FOR FABRICATING THE DIODE
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/2013/048179    International Application No.:    PCT/KR2012/007912
Publication Date: 04.04.2013 International Filing Date: 28.09.2012
IPC:
H01L 33/22 (2010.01)
Applicants: SEOUL OPTO DEVICE CO., LTD. [KR/KR]; #36, 1Block, 727-5, Wonsi-dong, Danwon-gu, Ansan-si, Gyeonggi-do 425-851 (KR)
Inventors: KIM, Jae Kwon; (KR).
LEE, Sum Geun; (KR).
KIM, Kyung Wan; (KR).
YOON, Yeo Jin; (KR).
SUH, Duk Il; (KR).
KIM, Ji Hye; (KR)
Agent: E-SANG PATENT & TRADEMARK LAW FIRM; 3F., Woodo Bldg., 82-2, Yangjae-dong, Seocho-gu, Seoul 137-890 (KR)
Priority Data:
10-2011-0100097 30.09.2011 KR
Title (EN) SUBSTRATE HAVING CONCAVE-CONVEX PATTERN, LIGHT-EMITTING DIODE INCLUDING THE SUBSTRATE, AND METHOD FOR FABRICATING THE DIODE
(FR) SUBSTRAT PRÉSENTANT UN MOTIF CONCAVE-CONVEXE, DIODE ÉLECTROLUMINESCENTE COMPRENANT LE SUBSTRAT ET PROCÉDÉ DESTINÉ À FABRIQUER LA DIODE
Abstract: front page image
(EN)Provided are a substrate having concave-convex patterns, a light-emitting diode (LED) including the substrate, and a method of fabricating the LED. The LED includes a substrate, and concave-convex patterns disposed in an upper surface of the substrate and having convexes and concaves defined by the convexes. Unit light-emitting device having a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer disposed on the substrate in sequence is present.
(FR)Cette invention se rapporte à un substrat qui présente des motifs concaves-convexes, à une diode électroluminescente (LED) qui comprend le substrat et à un procédé de fabrication de la LED. La LED comprend un substrat et des motifs concaves-convexes disposés dans une surface supérieure du substrat et qui présente des parties convexes et concaves définies par les parties convexes. Le dispositif électroluminescent unitaire présente une première couche de semi-conducteur conductrice, une couche active et une seconde couche de semi-conducteur conductrice disposées sur le substrat à la suite.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW.
African Regional Intellectual Property Organization (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
Publication Language: English (EN)
Filing Language: English (EN)