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1. WO2012143758 - SYSTEM AND METHOD FOR CLOCK SIGNAL GENERATION

Publication Number WO/2012/143758
Publication Date 26.10.2012
International Application No. PCT/IB2011/051717
International Filing Date 20.04.2011
IPC
H03L 7/183 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
7Automatic control of frequency or phase; Synchronisation
06using a reference signal applied to a frequency- or phase-locked loop
16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
18using a frequency divider or counter in the loop
183a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
H03L 7/099 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
7Automatic control of frequency or phase; Synchronisation
06using a reference signal applied to a frequency- or phase-locked loop
08Details of the phase-locked loop
099concerning mainly the controlled oscillator of the loop
CPC
H03L 7/08
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
7Automatic control of frequency or phase; Synchronisation
06using a reference signal applied to a frequency- or phase-locked loop
08Details of the phase-locked loop
H03L 7/183
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
7Automatic control of frequency or phase; Synchronisation
06using a reference signal applied to a frequency- or phase-locked loop
16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
18using a frequency divider or counter in the loop
183a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
H03L 7/1974
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
7Automatic control of frequency or phase; Synchronisation
06using a reference signal applied to a frequency- or phase-locked loop
16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
18using a frequency divider or counter in the loop
197a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
1974for fractional frequency division
Applicants
  • FREESCALE SEMICONDUCTOR, INC. [US]/[US] (AllExceptUS)
  • BODE, Hubert [DE]/[DE] (UsOnly)
Inventors
  • BODE, Hubert
Priority Data
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SYSTEM AND METHOD FOR CLOCK SIGNAL GENERATION
(FR) SYSTÈME ET PROCÉDÉ DE GÉNÉRATION DE SIGNAL D'HORLOGE
Abstract
(EN)
A clock signal generation system (10) comprises a clock signal generating circuit (12) arranged to provide a first clock signal having a selectable first clock rate; a divider circuit (14) connected to receive the first clock signal and arranged to generate, depending on a division factor, a second clock signal from the first clock signal, having a constant second clock rate and being synchronized with the first clock signal; and a controller module (16) connected to the divider circuit and arranged to change the division factor when a different first clock rate is selected, to keep the second clock rate constant and the second clock signal synchronized with the first clock signal.
(FR)
L'invention concerne un système de génération de signal d'horloge (10) comprenant un circuit de génération de signal d'horloge (12)conçu pour fournir un premier signal d'horloge ayant une première vitesse d'horloge sélectionnable; un circuit diviseur (14) connecté pour recevoir le premier signal d'horloge et conçu pour générer, en fonction d'un facteur de division, un second signal d'horloge à partir du premier signal d'horloge, ayant une second vitesse d'horloge constante et synchronisé avec le premier signal d'horloge; et un module de commande (16) connecté au circuit diviseur et conçu pour changer le facteur de division lorsqu'une première vitesse d'horloge différente est choisie, afin de maintenir la seconde vitesse d'horloge constante et le second signal d'horloge synchronisé avec le premier signal d'horloge.
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