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1. WO2012138781 - SHAPER DESIGN IN CMOS FOR HIGH DYNAMIC RANGE

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[ EN ]

SHAPER DESIGN IN CMOS FOR HIGH DYNAMIC RANGE

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit under 35 U.S.C. 1 19(e) of U.S.

Provisional Application No. 61/471 ,392 filed on 04/04/2011 , the content of which is incorporated herein in its entirety.

TECHNICAL FIELD OF THE INVENTION

[0002] The present invention relates to electronic circuit design in Complementary

Metal Oxide Semiconductor(CMOS), and more particularly to shaper design in CMOS for high dynamic range.

BACKGROUND

[0003] Front-end electronics for capacitive sensors typically includes a preamplifier followed by a filter. The preamplifier provides low-noise amplification of the signals induced in the sensor electrodes. The filter, by properly limiting the signal bandwidth, maximizes the Signal-to-Noise (S/N) ratio. Additionally the filter limits the duration of the output signal associated with the measured event and, for those sensors where the induced signal is relatively slow, it maximizes the signal amplitude, i.e. it minimizes the ballistic deficit, as described in G. F. Knoll, "Radiation detection and measurement", 3rd ed., John Wiley & Sons, 2000, which is incorporated by reference in its entirety as if fully set forth in this specification.

[0004] Filters can be either time-variant or time-invariant. In electronics for radiation sensors, time-invariant filters are frequently referred to as "shapers" since, in a time-domain view, they "shape" the response associated with events. Filters can also be

synthesized digitally, even though in most cases this is impractical due to constraints from power and real-estate budgets.

[0005] S/N ratio and dynamic range are important parameters reflecting performance of a shaper. In the following, we analyze classical shapers based on voltage feedback with passive components with respect to noise and dynamic range. Charge amplifiers, along with providing low-noise amplification, offer a low input impedance (i.e., virtual ground) which stabilizes the potential of a sensor electrode and reduces inter-electrode cross-talk. A charge amplifier 100 is schematized in Fig. 1 , where we assume an ideal voltage amplifier with infinite gain and bandwidth. A finite gain and bandwidth would have negligible consequence on our analysis, if the dc loop gain is high and the rise time is a small fraction of the peaking time.

[0006] The current Ii induced in the sensing electrode is amplified with current gain (or charge gain) Ac equal to the ratio of the feedback impedance Zf and the coupling impedance Zc. This ratio (i.e., the gain Ac) must be a real number, in order to avoid undesired tails in the output current Is injected in the next stage. The output current Is is injected, with opposite polarity, into the next stage, which offers another virtual ground and represents the input stage of a shaper 1 10. The current (or charge) is then filtered and converted into a voltage V0 with transfer function Zs. It is followed by further processing such as discrimination, peak- or time- detection, and/or counting. It is worth noting that the charge amplifier 100 can be realized using two or more charge-amplification stages with gains Ac1, Ac2, and overall charge gain Ac is given by the product of those. This is usually done when large values of Ac are required, such as for sensors generating very small signals.

[0007] For simplicity we assume for Zf an infinite resistive component and a finite capacitive component Cf. This is justified considering that designers tend to keep the resistive component as high as possible in order to minimize the parallel noise contribution at the

front-end. The coupling impedance will be capacitive according to Cc=CfAc. We also assume, initially, that the input stage of the shaper 1 10 is realized using a transimpedance amplifier with feedback impedance Z1=R1//C1, providing the first pole of the shaper with time constant τ1=R1 C1. Finally, we assume that the shaper amplifiers are characterized by infinite gain and are noiseless. The latter is justified by the fact that, in most practical cases, the noise contribution from the amplifiers can be made negligible by increasing the size and power of active devices. If this is not easy to achieve, then the noise from the amplifiers must be taken into account. The configuration resulting from these assumptions is shown in Fig. 2. Fig. 2 is a schematic circuit of a charge amplifier 210 assuming a capacitive feedback for the charge amplifier 210 and a single-pole transimpedance amplifier as an input stage 220 of a shaper 200, where the output waveform V1 in response to a charge Q is also shown, with peak amplitude Q.Ac/C1. The output V1 may be input into a subsequent stage 230 of the shaper 200.

[0008] Starting from these assumptions and from the configuration in Fig. 2, we can calculate the contribution to the Equivalent Noise Charge (ENC) of the first stage 220 of the shaper 200. The noise contribution comes from the dissipative component R1 of the shaper, as described in A. F. Arbel, "The second stage noise contribution of a nuclear pulse amplifier", IEEE Trans. Nucl. Sci., vol. 15, no. 5, pp. 2-5, 1968, which is incorporated by reference in its entirety as if fully set forth in this specification. The parallel noise spectral density of R1 is given by 4kT/R1 and it can be reported as an equivalent parallel noise generator at the input of the charge amplifier 210 by scaling it with the square of the charge gain Ac. It must be kept in mind that this is done for calculation purposes and the actual noise source is further down in the channel, not to be confused with the physical sources of parallel noise at the input. It follows the contribution to the ENC of R1, given by:


where ap is the ENC coefficient for white parallel noise, as described in V. Radeka, "Low noise techniques in detectors", Ann. Rev. Nucl. Part. Sci., vol. 38, pp. 217-277, 1988, and in E. Gatti and P. F. Manfredi, "Processing the signals from solid state detectors in elementary particle physics", La Rivista del Nuovo Cimento, vol. 9, pp. 1 -147, 1986, and in V. Radeka, "Signal processing for particle detectors", H. Schopper editor, Landolt-Bornstein, New Series 1/21 Bl , in press, each of which is incorporated by reference in its entirety as if fully set forth in this specification, and τρ is the peaking time (1% to peak) of the shaped signal. It is worth noting that an analysis based on front-end amplifier without feedback would give Ac dependent on the input capacitance, as described, for example, in Fig. 6.1 1 of V. Radeka, "Signal processing for particle detectors", H. Schopper editor, Landolt-Bornstein, New Series 1/21 Bl, in press, which is not the case for the charge amplifier configuration in Fig. 2. From Equation (1) it can be observed that the contribution decreases as Ac increases. Since the peaking time is proportional to the time constant, τρ = η pR1C1, we can write:


where ηρ depends on the type of shaping. Table l includes coefficients for unipolar shapers with real (R) and complex-conjugate (C) poles in different orders. Table I summarizes the values of ap and ηρ for semi-Gaussian shapers with real poles (even and odd) and complex conjugate poles (odd only) where the input stage is the real pole. Also included in Table I are the coefficient χ, which takes into account the noise contribution of the next stages, and the Relative Dynamic Range (RDR). In Table I are also reported aw, i.e., the ENC coefficient for white series noise, and the coefficients χ and RDR, which will be described later in this application.

Table I

[0009] It can be observed that, for a given shaper and charge gain Ac, the contribution ENCs1 is defined once the value of C1 is defined. The values of Ac and C1 also define, together, the maximum charge Qmax that the linear front-end can process. If V1max is the maximum voltage swing at the output of the stage, it follows:


[00010] We now express the dynamic range DR of the front-end as the ratio between the maximum charge Qmax and the total ENC, which includes the ENCca from the charge amplifier and the ENCs1 from the first stage of the shaper:


[0001 1 ] A design which aims at offering the highest possible resolution, i.e., lowest possible ENC tends to keep ENCs1 negligible with respect to ENCca. Assuming about 10% (in power) it follows:


[00012] It is important to observe that ENCca depends inherently on the total capacitance CIN at the input of the system in Fig. 1 and on the peaking time τρ. Here we assume that the charge amplifier has been already optimized for given CIN and τρ, and that the design of the shaper (with the 10% requirement) follows from that. Equation (5) shows that the dynamic range increases with V1 max and with the square root of C1. For a given shaper and capacitor value C1 the dynamic is maximized if V1max = Vdd, where Vdd is the maximum voltage allowed by the technology, which means that the shaper amplifier must implement a rail-to-rail output stage. Further increases can only be achieved by increasing the value of C1, which also means increasing Ac as shown in Equation (3) and the area (and power) of the first stage of the shaper. For example, for a 0.13 μm technology with 1.2 V supply and typical Metal-Insulator-Metal(MIM) capacitance of 2fF / μm2, assuming a CU-3 shaper (ap ηp = 1.09) with available area 30 x 30 μm , the dynamic range is limited, according to Equation (5), to DR < 3,600.

[00013] For a given C1, higher values of dynamic range can only be obtained at the expense of the ENC, and the maximum would be achieved when ENCs1 dominates over ENCca. Equation (5) can be written in the more general form:

η


where ρ > 1 is the ratio between the squares of the total ENC and the ENCs1 from the first stage of the shaper.

[00014] Fig. 3 shows an example of a compromise between ENC and Dynamic

Range (DR) for the circuit in Fig. 2 and ENCca = 200 e-. Curve 310 shows how DR varies with charge gain Ac, and curve 320 shows how ENC varies with charge gain Ac. The four cases of p = 1.1 , 2, 1 1, and 30 are shown, and it can be observed how the dynamic range can be increased at the expense of the ENC. Values of p lower than 1.1 (i.e., ENC is dominated by ENCs1) would not benefit the DR but would further limit the resolution by increasing the total ENC. The extreme case is for p = 1 (i.e., no charge amplification) where DR≈ 15,000 and ENC≈ 900 e-. On the other hand, values of p higher than 1 1 (i.e., ENC is dominated by ENCca) would not benefit much the ENC but would further limit the DR.

[00015] It is worth emphasizing one more time that the ENCca is assumed defined and optimized for noise (i.e. the charge amplifier is designed for given ClN and τρ) and that the design of the shaper follows from that. From Equation (6) it can also be observed that such defined DR does not depend on the peaking time τρ. However, once the system is designed with a given optimized ENCca and a given ρ, an adjustment of the peaking time (obtained by scaling the value of the resistors) would in most cases change ENCca and then would modify ρ and DR, while the noise contribution from the shaper would not change.

[00016] So far we have assumed as negligible the noise contribution from subsequent stages, which provide the additional poles of the shaper. We first consider the case of real coincident poles. These configurations are frequently referred to as "CR-RCn-1 shapers" since they can be realized using one CR filter followed by n-1 filters of RC type, and they are assumed to be connected at the voltage output of the charge amplifier. The resulting transfer function provides one zero in the origin, which compensates for the pole in the origin from the feedback capacitor of the charge amplifier, and n poles with time constant RC. The order of the shaping is equal to n with zeroes cancelled, and n poles in total. The lowest possible order without divergence of noise is n = 2, which results in the well-known and widely adopted CR-RC shaper. The equations in the frequency (Laplace) and time domains are as follows:


where n is the order and p is the real pole, coincident.

[00017] Fig. 4 shows a frequently adopted configuration for CR-RCn-1 shapers.

Each additional i pole is obtained by adding one stage with components Ci, Ri, and Ri/Avi, where Avi is the dc voltage gain. Assuming that the first filter stage (or first stage) 410 of a shaper 400 operates rail-to-rail, as required to minimize its and the following noise contributions, the performance of the shaper 400 is maximized when also the next stages also operate rail-to-rail. This condition is obtained with AV2≈e, AV3≈e/2, AV4≈e/2.25, AV5≈e/2.36, and so on. Next, the noise contribution of the two dissipative components of the second filter stage (or second stage) 420, i.e. R2 and R2/AV2 is evaluated. When reported as equivalent parallel generators at the input of the first pole, the noise spectral densities are respectively given by:


and they can be combined as a single noise generator:


where we used R1C1=R2C2 for coincident poles. A contribution such as this can be reported as an equivalent parallel noise generator at the input of a charge amplifier 430 by scaling it with the square of the charge gain Ac. After a few transformations it follows the contribution to the ENC of the second stage 420, given by:


where aw is the ENC coefficient for white parallel noise and depends on the order of the shaper with x2≈ 1 for the second order, 0.83 for the third order, 0.78 for the fourth order, and so on. From Equation (10) it can be observed that the noise contribution from the second stage 420 of the shaper 400, relative to the first, decreases as the order increases and as the C2/C1 ratio increases, and in principle can be made negligible for C2 » C1, i.e. at expenses of area and power.

[00018] As the order increases, the noise contribution from the next stages must be added. Eventually, the total contribution from the shaper can be written as:


where we assume rail-to-rail operation, Cs is the average capacitance per pole, and χ≈ 1 1 for the second order, 1.13 for the third order, 1.24 for the fourth order, 1.3 for the fifth order, and so on. It is worth emphasizing that the contribution of each additional stage can be made

negligible by increasing its capacitance relative to C1, which at equal gain (rail-to-rail operation) corresponds to a reduction in the value of the resistors.

[00019] Next consider the case of complex conjugate poles. These configurations, introduced by Ohkawa as described in A. Ohkawa, M. Yoshizawa, and K. Husimi, "Direct synthesis of the Gaussian filter for nuclear pulse amplifiers", Nucl. Instrum. & Meth., 138 (1979) 85-92, which is incorporated by reference in its entirety as if fully set forth in this specification, have the advantage of a faster return to zero at equal peaking time with respect to the real poles of the same order. The transfer functions in the frequency (Laplace) domain are:


where n is the order, p1 is the real pole, and rj, ij are the real and imaginary parts of the

complex-conjugate poles, obtained as roots of the equation

while in the time domain the transfer functions are:


where the coefficients Ki (with magnitude | Ki | and argument <Ki ) are given by:


[00020] Fig. 5 shows a frequently adopted configuration for these shapers, which includes a charge amplifier 510, a first filter stage 520 and second filter stage 530 of a shaper 500. If n is the order (odd in these cases), the real pole is given by the first filter stage and the complex conjugate poles are given by the (n-1 )/2 additional filter stages. Each additional filter stage has a transfer function:


where the values of ω0 = 1/τ0 (real pole), ωi and Qi, normalized to the peaking time τρ, can be obtained from Table II, which includes design coefficients for unipolar shapers with complex-conjugate poles in different orders. The value of Ci a is about 20 % of the value of Ci, and we can thus assume an average capacitance per pole Cs≈ (Ci+Cia)/2.

[00021 ] Evaluating the noise contribution of the dissipative components of these stages is cumbersome. Eventually, the total contribution from the shaper 500 can be written again as in Equation (1 1 ), where we assume again rail-to-rail operation, Cs is the average capacitance per pole, and χ≈ 5.5 for all orders. In these configurations most of the noise contribution comes from the series resistors Ria. Once again it is worth emphasizing that, apart from the first stage 520, the contribution can be made negligible by increasing the value of the average capacitance per pole Cs. Table I includes the value of χ for various orders.


[00022] Also included in Table I is the relative dynamic range RDR, i.e. the DR normalized to the one for the RU-2 case, assuming the same values for ENCca and p (e.g. p = 1 1 which is the practical case where ENCS = ENCca/10), and all shapers using the same value of C1 and Cs = C1. From Table I it may appear that low order shapers offer a higher DR. A thorough comparative analysis, though, should include the impact of the shaper on ENCca. For example, under constraint of finite pulse width (e.g. rate constraint) and white dominant series noise, higher order shapers offer a lower ENCca due to the higher symmetry (i.e. longer peaking time at equal width).

[00023] Applying these results to Equations (5) and (6) for the dynamic range, we obtain:


[00024] For a given total capacitance CT = C1 + (n-1 ) Cs, where n is the order of the shaper, the DR in (16) has a maximum around:


which for all of the low order shapers and high order shapers with complex conjugate poles is around CT/n while for high order shapers with real coincident poles is somewhat lower. The rest of the capacitance can be distributed in equal amount among the additional poles, but it should be observed that slightly better results can be obtained by assigning larger capacitance values to the last stage. Since the maximum is relatively shallow, the value of DR obtained for CT/n is still a good approximation.

[00025] In the previously reported example with Cs = d = 1.8 pF, ENCca = 200 e-, and p = 1 1 , it follows DR < 1,400 and 2,800 for CU-3 and RU-2, respectively. With the described configurations and assuming comparable area and power, the shapers with real poles offer a dynamic range of about 70% higher than the ones with complex conjugate poles.

[00026] Figs. 6(a)-(d) illustrate some configurations of classical shapers which could provide an alternative solution to the voltage feedback circuit in Fig. 2 for realizing a low-noise single pole stage. They make use of CMOS current mirrors to scale down the current in resistor R, thus reducing its noise contribution. In fact, if λ = λ1λ2 is the scaling factor, the dissipative current feedback IF through MF can be approximated as IF≈ Vo/Req, where Req = R·λ is the equivalent resistance, which sets with C the time constant of the filter, given by C·Req. The parallel noise contribution from R, reported at the input, scales down with λ2, being given by 4kT/(R ·X2), i.e. 4kT/(Req· λ). It results that, at equal C and time constant, the noise contribution from R is a factor λ lower than the one from R1 in the corresponding configuration of Fig. 2.

[00027] On the other hand, design constraints for linearity and dynamic range suggest that the dominant noise contribution comes from the channel noise of the last transistor of the feedback chain, MF.

[00028] We start analyzing the configuration in Fig. 6(a). This configuration can also make use of a cascode stage MC, as shown in the detail in Fig. 6(a), which is frequently used in complementary configurations as described in R. L. Chase, A. Hrisoho, and J. P. Richer, "8-channel CMOS preamplifier and shaper with adjustable peaking time and

automatic pole-zero cancellation", Nucl. Instrum. & Meth., A409 (1998) 328-331 , and C. Fiorini and M. Porro, "Integrated RC cell for time-invariant shaping amplifiers", IEEE Trans. Nucl. Sci., vol. 51, no. 5, pp. 1953- 1960, 2004, each of which is incorporated by reference in its entirety as if fully set forth in this specification. It can be easily verified that, in order to guarantee a linear response, the relationship R · gmR » 1 must be satisfied, where gm is the transconductance of MR (or the one of a cascode MOSFET, if applicable). This relationship imposes a limit to the minimum current IR flowing through R. Assuming that MR operates in moderate inversion (as required to mirrors to guarantee a large enough voltage swing), its gm can be approximated as gMR≈ IR / nVT, where n is the sub-threshold factor (n≈ 1.2 typical) and VT = kT/q is the thermal voltage (~ 25 mV at 300 K). It follows the requirement on the voltage drop across R, given by R ·IR » nVT. Since MF operates in moderate inversion, its white noise spectral density is given by SnMF = 2qIF. By considering the mirror ratio and by imposing the relationship for linear response it follows:


which shows that, at equal C and time constant (i.e., when Req = R1), the noise spectral density from MF would be larger than the one from R1 in Fig. 2, given by 4kT/R1. The low-frequency noise component from MF should also be added, but this contribution can be reduced, to some extent, by increasing the gate area of MF (i.e., by increasing both L and W of MF). The non-stationary noise contribution can be considered, which is due to the increase in the drain current of MF in presence of a signal. In the time domain this contribution, integrated in C, can be approximated as qiFτp/C2 where ip is the signal current and τP is the peaking time, which is a measure of the integration time. Additionally, the signal integrated

in C is given by QAc/C, where Q is the input charge and Ac is the charge amplifier charge gain. By considering that iFτp≈ QAc it follows for the signal-to-noise ratio due to the non-stationary contribution:


where N is the number of signal electrons at the input of the charge amplifier. In most practical cases this contributions has negligible impact on the total S/N due to Ac » 1 , as it can be observed assuming a minimum signal N « ENC, which means ENC is the number of electrons. Attempts to improve the linearity by controlling the gate voltage of the cascode Mc can be considered, as shown in Fig. 6(b) and in I. I. Jung, J. H. Lee, C. S. Lee, and Y. W. Choi, "Design of high-linear CMOS circuit using a constant transconductance method for gamma-ray spectroscopy system", Nucl. Instrum. & Meth., A629 (201 1) 277-281, which is incorporated by reference in its entirety as if fully set forth in this specification. However, the noise contribution from the controlling stages must be taken into account; also, maintaining the voltage drop across R below the thermal voltage Vr might be challenging.

[00029] Most of the previous arguments apply to the configuration in Fig. 6(c) as described in G. Bertuccio, P. Gallina, and M. Sampietro, '"R-Lens filter': an (RC)n current-mode low-pass filter", IEEE Electronics Letters, vol. 35, no. 15, pp. 1209-1210, 1999, which is incorporated by reference in its entirety as if fully set forth in this specification, where the MR is now the MOSFET used as source follower.

[00030] With regards to the configuration in Fig. 6(d), ideally the voltage drop across R1 can be kept small, but, in practical cases, it is difficult to reduce it to values much lower than the thermal voltage VT, and Equation (18) would still apply. A further challenge towards the various configurations in Figs. 6(a)-(d) is to obtain a high linearity in the mirror stages over a wide dynamic range of currents.

[00031 ] The discussions above suggest that the linear configurations that make use of active devices in the signal path (e.g., current mirrors) cannot offer a dynamic range wider than the corresponding based on passive components only. It should be observed that OTA-based CMOS stages would enter this category as well, as described in T. Noulis, C. Deradonis, S. Siskos, and G. Sarrabayrouse, Nucl. Instrum. & Meth., A583 (2007) 469-478., which is incorporated by reference in its entirety as if fully set forth in this specification. The use of BiCMOS technologies would greatly alleviate the limitation in linearity, as shown in S. Buzzetti and C. Guazzoni, "A novel compact topology for high-resolution CMOS/BiCMOS spectroscopy amplifiers", IEEE Trans. Nucl. Sci., vol. 52, no. 5, pp. 161 1-1616, 2005, which is incorporated by reference in its entirety as if fully set forth in this specification, but some of the limitations previously discussed still apply, including the loss due to the voltage drops.

[00032] Therefore, there is a need for a low-noise analog shaper that provides high dynamic range.

SUMMARY

[00033] An analog filter is disclosed. A preferred embodiment of the analog filter includes a chain of filter stages, and each filter stage has an input node and an output node. The output node of a filter stage in the chain of filter stages is connected to the input node of an immediately succeeding filter stage through a resistor. Each filter stage includes an amplifier and a capacitor.

[00034] The analog filter includes a first feedback resistor for providing a negative feedback. The first feedback resistor has a first end and a second end. The first end is connected to the output node of the last filter stage along the chain of filter stages, and the second end is connected to the input node of a first preceding filter stage.

[00035] The analog filter also includes a feedback capacitor for providing a positive feedback. The feedback capacitor has a first end and a second end. The first end is connected to the output node of one of the chain of filter stages, and the second end is connected to the input node of a second preceding filter stage.

[00036] The analog filter may further include a second feedback resistor for providing a negative feedback. The second feedback resistor has a first end and a second end. The first end of the second feedback resistor is connected to the output node of the filter stage immediately preceding the last filter stage, and the second end of the second feedback resistor is connected to the input node of a third preceding filter stage.

[00037] In an alternative embodiment, the input node of the first filter stage in the chain of filter stages may be coupled to a current source. In an alternative embodiment, the output at the output node of the last filter stage may be voltage.

[00038] A method for filtration of a signal is also disclosed. In a preferred embodiment of the method for filtration of a signal, the method includes filtering the signal through a chain of filter stages, each filter stage has an input node and an output node, and the output node of a filter stage in the chain of filter stages is connected to the input node of an immediately succeeding filter stage through a resistor; feeding the signal at the output node of the last filter stage along the chain of filter stages to the input node of a first preceding filter stage through a first negative feedback loop; and feeding the signal at the output node of one of the chain of filter stages to the input node of a second preceding filter stage through a positive feedback loop.

[00039] In an alternative embodiment, the feeding the signal at the output node of the last filter stage along the chain of filter stages to the input node of a first preceding filter stage through a first negative feedback loop includes feeding the signal at the output node of the last filter stage along the chain of filter stages to the input node of the first preceding filter stage through a resistor.

[00040] In an alternative embodiment, the method may further include the feeding the signal at the output node of the filter stage immediately preceding the last filter stage to the input node of a third preceding filter stage through a second negative feedback loop. In an alternative embodiment, the_feeding the signal at the output node of the filter stage immediately preceding the last filter stage to the input node of a third preceding filter stage through a second negative feedback loop includes feeding the signal at the output node of the filter stage immediately preceding the last filter stage to the input node of the third preceding filter stage through a resistor.

[00041] In an alternative embodiment, the feeding the signal at the output node of one of the chain of filter stages to the input node of a second preceding filter stage through a positive feedback loop includes feeding the signal at the output node of the one of the chain of filter stages to the input node of the second preceding filter stage through a capacitor.

[00042] In an alternative embodiment, the feeding the signal at the output node of one of the chain of filter stages to the input node of a second preceding filter stage through a positive feedback loop includes feeding the signal at the output node of the last filter stage along the chain of filter stages to the input node of the filter stage immediately preceding the last filter stage through a capacitor.

BRIEF DESCRIPTION OF THE DRAWINGS

[00043] For a more complete understanding of the present invention, and for further advantages thereof, reference is now made to the following description taken in conjunction with the accompanying drawings in which:

[00044] Fig. 1 is a schematic diagram illustrating a charge amplifier followed by a shaper;

[00045] Fig. 2 is a schematic diagram illustrating a charge amplifier with a capacitive feedback for the charge amplifier and a single-pole transimpedance amplifier as input stage of a shaper;

[00046] Fig. 3 is a graph showing an example of dynamic range and equivalent noise charge vs. charge gain Ac, including four cases of p = 1.1 , 2, 1 1 , and 30;

[00047] Fig. 4 is a schematic diagram illustrating a charge amplifier followed by a shaper with real coincident poles;

[00048] Fig. 5 is a schematic diagram illustrating a charge amplifier followed by a shaper with complex conjugate poles;

[00049] Fig. 6(a) is a schematic diagram illustrating an alternative configuration for realization of low-noise single-pole stages;

[00050] Fig. 6(b) is a schematic diagram illustrating an alternative configuration for realization of low-noise single-pole stages;

[00051 ] Fig. 6(c) is a schematic diagram illustrating an alternative configuration for realization of low-noise single-pole stages;

[00052] Fig. 6(d) is a schematic diagram illustrating an alternative configuration for realization of low-noise single-pole stages;

[00053] Fig. 7 is a schematic diagram illustrating delayed feedback applied to a second order shaper according to one embodiment of the present invention;

[00054] Fig. 8 is a schematic diagram illustrating delayed feedback applied to a third order shaper according to one embodiment of the present invention;

[00055] Fig. 9(a) is a schematic diagram illustrating delayed feedback applied to a fifth order shaper according to one embodiment of the present invention;

[00056] Fig. 9(b) is a schematic diagram illustrating a shaper of sixth order according to one embodiment of the present invention;

[00057] Fig. 9(c) is a schematic diagram illustrating a shaper of seventh order according to one embodiment of the present invention;

[00058] Fig. 9(d) is a schematic diagram illustrating a shaper of fifth order with a positive feedback capacitor across four stages according to one embodiment of the present invention;

[00059] Fig. 9(e) is a schematic diagram illustrating a shaper of fifth order with a positive feedback capacitor across two middle stages according to one embodiment of the present invention;

[00060] Fig. 9(f) is a schematic diagram illustrating a shaper of seventh order with one non-inverting stage according to one embodiment of the present invention;

[00061 ] Fig. 10(a) is a diagram illustrating an example of realization using the schematic diagram in Fig. 5;

[00062] Fig. 10(b) is a diagram illustrating an example of realization using the schematic diagram in Fig. 8;

[00063] Fig. 10(c) is a diagram illustrating an alternative example of realization using the schematic diagram in Fig. 8;

[00064] Fig. 1 1(a) is a graph showing simulated pulse response of a shaper using the circuit in Fig. 10(a), 10(b) and 10(c), respectively; and

[00065] Fig. 1 1(b) is a graph showing integrated output noise spectral density of a shaper using the circuit in Fig. 10(a), 10(b) and 10(c), respectively.

DETAILED DESCRIPTION

[00066] The following discussion is presented to enable a person skilled in the art to make and use the invention. Various modifications will be readily apparent to those skilled in the art, and the general principles described herein may be applied to embodiments and applications other than those detailed below without departing from the spirit and scope of the present invention as defined herein. The present disclosure is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed.

[00067] The present disclosure provides a method and apparatus for designing low-noise analog shapers. The shaper according to preferred embodiments of the present invention is capable of reducing noises and providing high dynamic range. Some basic blocks in the disclosed embodiments may also be used as part of time-variant filters.

[00068] The discussion above on the design of low-noise linear shapers suggests that, once the Equivalent Noise Charge (ENC) from a charge amplifier is defined, the dynamic range of the system is set by the voltage swing and the value of the capacitance realizing the poles of a shaper following the charge amplifier. The configuration used to realize the pole(s) has also relevant impact. Those configurations based on passive components in feedback offer a better dynamic range than the ones using both active and passive components, like scaling mirrors. The disclosed embodiments introduce the concept of Delayed Dissipative Feedback (DDF), and apply the DDF to voltage-based configurations. The delayed dissipative feedback can overcome some of the limitations of the more classical configurations discussed above.

[00069] A most frequently adopted shape is the semi-Gaussian, available in different orders (i.e. number of poles). Semi-Gaussian shapers are relatively easy to

implement and can offer a signal-to-noise ratio within a few percent from the usually impractical optimal shapers. For example, for white series and white parallel noise contributions, the minimum ENC for a high order semi-Gaussian shape is about 12.5% higher than the one for the optimum shape (i.e., infinite cusp).

[00070] One embodiment of applying the DDF is to delay wherever possible the feedback of the resistive (or dissipative) components. An example of applying the DDF to a second order filter is shown in Fig. 7. Fig. 7 includes a charge amplifier 710, followed by a shaper 700 including a first filter stage 720 and a second filter stage 730.

[00071] In the configuration of Fig. 7, the resistive (or dissipative) feedback to the input of the shaper 700 is provided through R1 from the output Vo, delayed by the time constant R2C2, rather than from V1. As in previous cases, the minimization of the noise contributions is achieved when both V1 and Vo operate rail-to-rail at the maximum input charge, which requires a defined value for Av2. Note that Av2 must be negative in order for the feedback through R1 to be negative. The input stage of the amplifier Av2 is not a virtual ground, but does not need to be rail-to-tail. The transfer function Vo/V1 can be alternatively realized using an active filter, with minor impact on the noise performance.

[00072] The transfer function can be easily calculated as:


[00073] It can be easily verified that two real and coincident poles with time constant τ0 are obtained if R1C1=2τoAV2 and R2C2o/2. If the first stage 720 operates rail-to- rail, as required to minimize its and the following noise contributions, the performance of the shaper 700 is maximized when also the next stages operate rail-to-rail, which is obtained for ηρ = τo/R1C1 = 1/e (i.e., the ratio between the peaking time and R1C1 is a factor ~ 2.718, which is lower than that in the case in Fig. 3). The noise contribution of the two dissipative components, R1 and R2 can now be calculated. Concerning R1, the result in Equation (2) still applies, where ap = 0.92, which is obtained from table I. Eventually the contribution from R2 can be either calculated or simulated. The total contribution from the shaper 700 can be written as in Equation (1 1) with χ≈ 1.35 and the dynamic range as in Equation (16) with a maximum again, for C2≈ C1. When compared to the same order configuration in Fig. 4, the noise power of this configuration at equal total capacitance is less than a half, which is a ~ 0.44 factor, and the dynamic range is about 50 % higher, which is a ~ 1.52 factor.

[00074] The configuration in Fig. 7 can also be used to realize a second order shaper with two complex conjugate poles. This is obtained for R1C1 = Av2/( ω 1Q1) and R2C2 = Q1/ ω1 where the values of ω1 and Q1 are obtained from Table II. For this configuration the values of ηp and χ are 0.4 and 1.38, respectively. The noise power at equal capacitance and the dynamic range are comparable to the ones for the previous case of real poles, with the advantage of a slightly faster return to baseline at equal peaking time.

[00075] The delayed dissipative feedback can be used for higher order configurations. Fig. 8 shows an example of a third order realization of a shaper 800, which includes a first filter stage 810, a second filter stage 820 and a third filter stage 830. The output of the third filter stage 830, i.e., the last filter stage in the shaper 800, is connected to the input of the first filter stage 810 through a resistor R1 to provide a negative feedback. The output of the last filter stage 830 is also connected to the input of the second stage 820 through a capacitor Cx to provide a positive feedback.

[00076] The shaper 800 has a transfer function of:


where τ1=R1C1, τ2=R2C2, τ3=R3C3, and αχν3τ2 (here τ2X=R2Cx). It is important to observe that without capacitance Cx, it would not be possible to obtain a semi-Gaussian shaper, either with real coincident or with complex conjugate poles as in Table II. In the case of real coincident poles with time constant τo, it follows:


which, once solved, yields:


[00077] The values ηρ = 0.52 and Av3 = 1.08 must be chosen in order to have all stages operating at equal voltage range (i.e., rail-to-rail), which also corresponds to the minimum noise at equal gain. The condition αx≥ 0.25 must be satisfied, where αx = 0.25 offers the minimum noise. The consequent value of χ to be used in Equation (1 1) is 3.6. When compared to the same order configuration in Fig. 4, the noise power at equal total capacitance is a factor 0.58 lower and the dynamic range is about 31 % higher.

[00078] The configuration in Fig. 8 may also be used to realize a third order shaper with complex conjugate poles, imposing:


[00079] The values ηρ = 0.57 and Av3 = 1.08 must be chosen in order to have all stages operating at equal voltage range (i.e. rail-to-rail), which also corresponds to the minimum noise at equal gain. The condition αx≥ 0.35 must be satisfied, where αx = 0.35 offers the minimum noise. The consequent value of χ to be used in Equation (1 1) is 4.32. When compared to the same order configuration in Fig. 5, the noise power at equal total capacitance is a factor 0.26 lower and the dynamic range is about 95% higher.

[00080] The delayed dissipative feedback may be used in various configurations.

Fig. 9(a) shows an example of a delayed dissipative feedback applied to a fifth order shaper 900, where a small capacitance Cx in positive feedback, needed to obtain a semi-Gaussian shape, is applied from the output of the last stage, i.e., the fifth stage 918, to the input of the stage immediately preceding the last stage, i.e., the fourth stage 916. Negative feedback is provided from the output of the last stage 918 to the input of the first stage 910 and the third stage 914 through resistor R1 and R3, respectively. Negative feedback is also provided from the output of the fourth stage 916 to the input of the second stage 912 through resistor R2.

[00081] The configuration in Fig. 9(a) can be used for real or complex conjugate poles. Table III summarizes the coefficients and performance achievable using the delayed dissipative feedback. The RDRDDF is always relative to the RU-2 case in Table I.

Table III


[00082] A comparison between Table I and Table III shows that the DDF is particularly beneficial with low and medium order shapers. This is also highlighted observing the ratio RDRDDF/RDR in Table III. A very promising configuration seems to be CU-3df where a factor of two (2) higher dynamic range can be achieved with respect to the classical configuration. With high order cases the impact is small or negligible due to the noise contribution from the additional poles, which can be seen by the increase in coefficient χ. However, the use of larger values for Ri reduces in all cases the value of the current required to generate the rail-to-rail voltage drop, thus reducing its noise contribution.

[00083] Fig. 9(b) illustrates an example of a delayed dissipative feedback applied to a sixth order shaper 920 having six filter stages 922, 924, 926, 928, 930 and 932. Fig. 9(c) illustrates an example of a delayed dissipative feedback applied to a seventh order shaper 940 having seven filter stages.

[00084] Fig. 9(d) illustrates an example of a delayed dissipative feedback applied to a fifth order shaper 950, which includes five filter stages 952, 954, 956, 958 and 960. In Fig. 9(d), a small capacitance Cx in positive feedback, needed to obtain a semi-Gaussian shape, is applied from the output of the last stage, i.e., stage 960, to the input of the second stage 954. [00085] Fig. 9(e) illustrates an example of a delayed dissipative feedback applied to a fifth order shaper 962, which includes five stages 964, 966, 968, 970 and 972. In Fig. 9(e), a small capacitance Cx in positive feedback is applied from the output of the third stage 968 to the input of the second stage 966.

[00086] Fig. 9(f) illustrates an example of a delayed dissipative feedback applied to a seventh order shaper 974. Compared to Fig. 9(c), the fourth pole, i.e., stage 976, is obtained using a non-inverting configuration. As in all other DDF configurations, resistive negative feedbacks are from the furthest available nodes back to the inputs of inverting amplifiers. In this example a small capacitor Cx in positive feedback is applied from the output of the last stage 978 to the input of the immediately preceding stage 980.

[00087] As a design example, a CdZnTe based Gamma-ray detection system is considered, which needs to operate in the 10 keV to 3 MeV range with an electronic resolution better than 1 keV FWHM (e.g., ENC≈ 90 electrons rms). In a first phase a charge amplifier is designed and optimized in order to meet the required resolution. In doing so a third order semi-Gaussian shaper is used with complex conjugate poles and a peaking time of 500 ns.

[00088] The design of the shaper starts from the requirements on the dynamic range and resolution. To keep negligible the noise contribution from the shaper, a v > 1 1 in Equation (16) may be selected. Following from Equation (16), Table I, and a CMOS 130 nm technology (i.e., 1.2V and MIM capacitance 2fF / μm 2) we have:


or C≥ 6-107εp4kT(1 + χ)≈ 960 fFsp (1 + χ)

where C is the average capacitance per pole, considering room temperature and a linear operation up to about 100 mV from the rails (i.e., 1 V maximum swing).

[00089] If the shaper is designed using the configuration in Fig. 5 as a first case, where ερ≈ 1.79 and χ≈ 5.5, the total shaper capacitance is Ctot≥ 33.5 pF, which corresponds to a minimum area of about 16,750 μm 2 (e.g., ~ 130 μm x 130 μm). If using the configuration in Fig. 8 as a second case, where ερ≈ 0.57 and χ ~ 4.32, the total shaper capacitance is Ctot≥ 8.7 pF, which corresponds to a minimum area of about 4,365 μm2 (e.g., ~ 66 μm x 66 μm). The required total resistance is ~ 130 k Ω. in the first case and ~ 560 k Ω in the second case. The corresponding area in the selected technology for linear resistors, characterized by ~ 350 Ω/square, is in minimum size about 70 μm and 270 μm2 , respectively, with regard to the first case and the second case. Once the relatively small area for amplifiers and routings is included, the first case requires at least 18,000 μm 2 (e.g., about 135 μm x 135 μm ) while the second 5,000 μm2 (e.g., 71 μm x 71 μm ), with a saving in area of about 72 %. Additionally, the value of charge gain Ac is ~ 107 in the first case and ~ 28 in the second case, and the current needed to generate the dc voltage drops is more than 10 times lower.

[00090] Fig. 10(a) shows a first case of the realization of a shaper using the circuit in Fig. 5; and Fig. 10(b) shows a second case of the realization of a shaper using the circuit in Fig. 8 at equal dynamic range of the first case. Fig. 10(c) shows a third case where realization of a shaper is done using the circuit in Fig. 8 with a total capacitance equal to that of the first case in Fig. 10(a).

[00091] In Fig. 1 1(a) the simulations of the pulse response to an input charge of 1 fC is shown, and in Fig. 1 1(b), the integral of the output noise power spectral density for all three cases in Fig. 10 is shown. As shown in Fig. 1 1(a), the pulse responses for the three cases in Figs. 10(a)- 10(c) are basically the same. Curve 1 1 12 in Fig. 1 1 (b) is the output noise spectral density of the shaper in Fig. 10(a), and Curves 1 1 14 and 1 1 16 are the output noise spectral density of the shaper in Fig. 10(b) and 10(c), respectively.

[00092] It has been observed from Figs. 1 1(a) and 1 1 (b) that, compared to the first case as illustrated in Fig. 10(a), the second case as illustrated in Fig. 10(b) has comparable noise with a capacitance of about four times lower (i.e., a saving in area of about 70 %), while the third case as illustrated in Fig. 10(c) has about half of the rms noise at comparable total capacitance. In this simulation the noise contributions from the amplifiers are not included for the previously given reasons. To a first order, the noise contribution from the first amplifier of the shaper depends only on the value of Cf thus being comparable in all three cases.